At this week’s RISC-V Summit in San Jose, California, Ventana Micro Systems introduced Veyron V1. The data centre class RISC-V CPU runs at 3.6GHz and will be offered in the form of high performance chiplets and IP.
The Veyron V1 is the first RISC-V processor to provide single thread performance that is competitive with the latest incumbent processors for data centre, automotive, 5G, AI and client applications, claimed Ventana Micro Systems. Its efficient microarchitecture also enables the highest single socket performance among competing architectures, said the company.
The efficient performance of the Veyron, combined with RISC-V’s open and extensible architecture optimises the workload for efficiency gains which are enhanced further through domain specific acceleration that will extend Moore’s Law to deal with the emerging energy and thermal constraints for data centres, the company said.
The standards-based Veyron V1 compute chiplet and reference platform are claimed to accelerate time to market by up to two years and reduce development costs by up to 75 per cent. Chiplet based solutions provide flexibility and are economical by right sizing compute, IO and memory while composable architectures leveraging chiplets allow companies to focus on innovation.
Ventana provides a software development kit (SDK) which includes an extensive set of software building blocks already proven on Ventana’s RISC-V platform.
The RISC-V CPU core is the centrepiece of the first compute chiplet solution with chiplets supplied by different companies. Ventana’s Veyron platform also enables integration of a flexible domain specific accelerator for hardware / software codesign.
Veyron V1 will be available in the second half of 2023 and is the first in a series of products from Ventana.
“Ventana has a world class team with an average of twenty plus years of experience bringing multiple new CPU architectures to market,” said Patrick Moorhead, founder and chief analyst at Moor Insights & Strategy. “Ventana is the first big core in RISC-V to show up, the only game in town, and has a jump on the market.”
Key features include a 5nm process technology, 16 cores per cluster and a high core count multi-cluster scalability up to 128 cores. There is 48Mbyte of shared L3 cache per cluster, advanced side channel attack mitigation for cybersecurity and I/O memory management and advanced interrupt architecture (AIA) system IP.
