Rad-hard ICs are for cost-conscious satellites, says ST

Radiation-hardened (rad-hard) components by STMicroelectronics help low earth orbit (LEO) satellites expand communication and earth observation services. ST said it is simplifying the design and volume production of the new generation of reliable small, inexpensive satellites to deliver services like earth observation and broadband internet from LEOs.

The new series of rad-hard power analogue and logic ICs are supplied in inexpensive plastic packages. The initial nine devices have been released and include a data converter, a voltage regulator, an LVDS transceiver, a line driver, and five logic gates that are used throughout systems like power generation and distribution, on-board computers, telemetry star trackers, and transceivers. 

The nine parts are the LEO3910 2A adjustable low-dropout voltage regulator, the LEOAD128 eight-channel, 1Mssample per second 12-bit ADC, the LEOLVDSRD 400Mbits per second LVDS driver-receiver, LEOAC00 quad two-input NAND gate, LEOAC14 hex inverter with Schmitt-trigger input, LEOA244 octal bus buffer with tri-state outputs, LEOAC74 dual D-type flip-flop, LEOAC08 quad two-input AND gate and LEOAC32 quad two inputs OR gates. 

The LEO rad-hard plastic parts are ready to use in ‘New Space’ applications, with optimised qualification and production flows and economies of scale. They require no additional qualification or up-screening from their users, and therefore eliminate significant cost and risk, ST confirmed.

The series ensures a radiation hardness match to the LEO mission profile, with a total ionisation dose immunity up to 50krad(Si), high immunity to total non ionising dose and single event latch-up (SEL) immunity up to 62.5MeV.cm²/mg. The parts are assembled on the same production line used for ST’s AEC-Q100 automotive-qualified ICs.

The parts outgassing is characterised to ensure it stays within the commonly accepted limits of New Space. External terminations’ finishing ensures the absence of whiskers in space, while being compatible with both leaded (Pb) and pure tin mounting processes as well as REACH-compliant.

ST said it continue to grow the series adding more functions in the coming months to further expand designers’ choices.

http://www.st.com

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Renesas expands RZ family with RISC-V core addition

Renesas has announced that its RZ/Five family now includes general purpose microprocessor units (MPUs) built around a 64-bit RISC-V CPU core. The company selected the Andes AX45MP, based on the RISC-V CPU instruction set architecture (ISA). 

According to Hiroto Nitta, senior vice president and head of SoC business in the IoT and Infrastructure business unit at Renesas, the introduction of the RZ/Five MPUs and accompanying ecosystem support, shows Renesas “taking the lead in providing RISC-V solutions ahead of the market”.

The RZ/Five is the first general-purpose MPU available to be built around a 64-bit RISC-V core from Andes,” confirmed Frankwell Lin, chairman and CEO at Andes Technology. “Andes has collaborated with Renesas first on the 32-bit RISC-V core and now on the 64-bit AX45MP, and I anticipate that this development will lead to the early adoption of customers’ devices in the global market built with Andes’ advanced RISC-V processor families,” he said.

There is increased demand for IoT endpoint devices, such as gateways for solar inverters or home security systems, to collect sensor data and connect to servers or to the cloud. In response, RZ/Five is optimised to provide the performance and peripheral functions required of IoT endpoint devices. Its maximum operating frequency is 1.0GHz. Peripheral functions include support for multiple interfaces, such as two Gigabit Ethernet channels, two USB 2.0 channels and two CAN channels, as well as dual ADC modules. Support is also provided for connecting external DDR memory with error checking and correction (ECC) and security functions.

The peripheral functions and package of RZ/Five are compatible with those of the Arm core–based RZ/G2UL. The RZ/Five also comes in a smaller, compact package. An RZ SMARC evaluation board kit will be offered with a module board conforming to the SMARC 2.1 standard, equivalent to the currently available environment for the RZ/G Series. This kit allows switching and evaluating between an RZ/Five CPU module and an RZ/G2UL CPU module, enabling easy evaluation and shortening product development cycles.

Renesas offers Linux support via a Verified Linux Package (VLP) with industrial-grade Civil Infrastructure Platform (CIP) Linux. This offers long term maintenance support for more than 10 years and is designed to make the RZ/Five series appealing for corporate infrastructure and industrial applications that require a high level of reliability and extended service life. It also allows users to dramatically reduce future Linux maintenance costs, said Renesas.

Samples of the RZ/Five MPUs are available starting today, and mass production is scheduled to begin in July 2022. 

https://www.renesas.com

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MEMS sensors add machine learning in the edge and electrostatic sensing 

A third generation of MEMS sensors are intended for consumer mobiles and smart industries, healthcare, and retail.

MEMS technology drives the intuitive context-aware features of today’s smartphones and wearables. STMicroelectronics claims that its latest generation of MEMS sensors take performance beyond established technical limitations on output accuracy and power consumption. The new sensors can deliver the highest accuracy for product features such as activity detection, indoor navigation, and precision industrial sensing. At the same time, they keep battery demand low for longer runtimes.

Selected variants include extra features such as ST’s machine learning core (MLC) and electrostatic sensing. The MLC brings adaptive, machine learning capabilities to edge applications that operate at extremely low power. The charge variation (QVAR) sensing channel monitors changes in electrostatic charge, either through contact with the body in a smartwatch or fitness band or by non-contact sensing (radar). The MEMS sensors with QVAR can enhance user interface controls for seamless interactions or to simplify detection of moisture and condensation. Radar mode applications include human presence detection, activity monitoring and people counting.

The LPS22DF and waterproof LPS28DFW barometric pressure sensors operate from 1.7 microA and have absolute pressure accuracy of 0.5hPa. The LPS28DFW has dual full scale capability, enabling accurate vertical position both underwater and out of water. The full scale range is selectable up to 1260 or 4060hPa, equivalent to water pressure at a depth of about 98 feet (30m). The sensors enhance altimeter and barometer performance in portable devices and wearables including sport watches. Typical industrial applications include equipment for weather monitoring and accurate water-depth sensing.

The LIS2DU12 three-axis accelerometer has been designed to build a low power architecture with active anti-aliasing. The anti-aliasing filter operates with a current consumption among the lowest in the market, claims STMicroelectronics. The LIS2DU12 consumes only 3.5 microA at 100Hz output data rate (ODR) and is also the first accelerometer with I3C interface, according to the company. 

The accelerometer is a small footprint of 2.0 x 2.0 x 0.74mm. The accelerometer is designed for wearable devices, hearing aids, true wireless stereo (TWS) and wireless sensor nodes.

The LSM6DSV16X six-axis iNEMO inertial module contains QVAR electrostatic sensing as well as the MLC and a finite state machine (FSM). The operating current can be as little as 12 microA. The FSM enables adaptive self-configuration (ASC). With ASC, the device understands the context and reconfigures itself without waking up the system, gaining a significant extra power saving. 

The MEMS sensor will enter production and has been demonstrated in an electrostatic radar application for early user detection to accelerate waking-up a laptop PC.

The LPS22DF pressure sensor is supplied in a 2.0 x 2.0 x 0.73mm 10-lead LGA package and the LPS28DFW is supplied in a 2.8 x 2.8 x 1.95mm seven-lead LGA are in production now. Free samples are available. The LIS2DU12 and LSM6DSV16X are scheduled for production later in 2022.

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SoC uses computing-in-memory for speech processing at the edge

Computing-in-memory technology is poised to eliminate the massive data communications bottlenecks associated with AI speech processing at the network’s edge, said Witinmen. The company has worked with Microchip Technology’s subsidiary Silicon Storage Technology (SST) to develop an embedded memory that simultaneously performs neural network computation and stores weights. Microchip Technology announced that its SuperFlash memBrain neuromorphic memory has been combined with the Witinmem neural processing SoC. The SoC is claimed to be the first in volume production that enables sub-mA systems to reduce speech noise and recognise hundreds of command words, in real time and immediately after power-up.

Microchip has worked with Witinmem to incorporate Microchip’s memBrain analogue in-memory computing, based on SuperFlash technology, into Witinmem’s low-power SoC. The SoC features computing-in-memory technology for neural networks processing including speech recognition, voice-print recognition, deep speech noise reduction, scene detection, and health status monitoring. Witinmem is working with multiple customers to bring products to market during 2022 based on this SoC.

“Witinmem is breaking new ground with Microchip’s memBrain solution for addressing the compute-intensive requirements of real time AI speech at the network edge based on advanced neural network models,” said Shaodi Wang, CEO of Witinmem. “We were the first to develop a computing-in-memory chip for audio in 2019, and now we have achieved another milestone with volume production of this technology in our ultra-low-power neural processing SoC that streamlines and improves speech processing performance in intelligent voice and health products.”

Microchip’s memBrain neuromorphic memory is optimised to perform vector matrix multiplication (VMM) for neural networks. It enables processors used in battery-powered and deeply-embedded edge devices to deliver the highest possible AI inference performance per Watt. This is accomplished by both storing the neural model weights as values in the memory array and using the memory array as the neural compute element. The result is 10 to 20 times lower power consumption than alternative approaches, claims Microchip, and a lower overall processor bill of materials (BoM) costs because external DRAM and NOR are not required. 

Permanently storing neural models inside the memBrain’s processing element also supports instant-on functionality for real time neural network processing. Witinmem has leveraged SuperFlash technology’s floating gate cells’ non-volatility to power down its computing-in-memory macros during the idle state to further reduce leakage power in demanding IoT use cases.

http://www.sst.com

http://www.microchip.com

http://www.witintech.com

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