MCUs are validated for security, says NXP
Microcontrollers (MCUs) from NXP Semiconductors have received Level 2 certifications by both the PSA Certified scheme co-developed by Arm and the GlobalPlatform Security Evaluation Standard for IoT Platforms (SESIP) using the secure protection profile for embedded processors. The LPC55S16 MCU is intended for IoT and Industrial edge applications, device security and data protection.
The LPC55S16 MCU is part of the NXP EdgeVerse computing and security portfolio and a member of the general purpose LPC5500 MCU series based on the Arm Cortex-M33 core. The MCU series is based on 40nm NVM process technology, and offers advanced security and mixed-signal capabilities.
The LPC55S16 MCU achieved PSA Certified Level 2, based on an assurance framework to showcase robustness of the security. The certification enables device manufacturers to reduce additional security testing and improve time to market. The laboratory evaluation against the PSA Root of Trust (PSA-RoT) security claims to demonstrate that the device can protect against scalable software attacks.
To achieve GlobalPlatform SESIP 2, the LPC55S16 MCU underwent source code analysis and penetration testing and was validated by an independent certification body. SESIP certification helps assure product security claims are tested and verified, and provides evidence of the LPC55S16 MCU’s resistance to basic attack potential. SESIP allows for customers to re-use the LPC55S16 MCU validation results in the certification process for their end applications.
The LPC55S16 MCU integrated security features include Arm TrustZone technology, which enables system-wide software protection with the ability to securely isolate peripherals to reduce the risk of attack on critical components. There is also an AES-256 accelerator which provides confidentiality and a secure hash algorithm (SHA2) accelerator provides integrity of secure communications and secure boot. A Prince module offers real-time encryption and decryption of the on-chip flash to provide both secure storage of data and asset protection of software IP.
The Casper Crypto co-processor enables hardware acceleration of various asymmetric cryptographic algorithms to establish secure connections, while a physical unclonable function (PUF) uses dedicated on-chip SRAM to construct unique device root keys (64 to 4096 bits) for secure storage. Other protection features are a 128-bit unique device serial number for identification (UUID) and a true random number generator (TRNG). A code watchdog enables integrity checking of execution flow of the firmware and a debug authentication protocol is provided for secure debugging.
The LPC55S16 MCU is part of the Certified EdgeLock Assurance program. Both the SESIP and PSA Certified testing and certifications were conducted by the independent security evaluation laboratory, Brightsight.
The i.MX LPC55S16 MCU family is available now.
