Two IP cores have been added to the Tensilica ConnX family of DSPs by Cadence. Intended for embedded processing in automotive, consumer and industrial markets, the ConnX 110 and ConnX 120 DSPs’ architecture is optimised for small memory footprint and low-power signal processing. The ConnX 110 and ConnX 120 DSPs share a common instruction set architecture (ISA) with the ConnX B10 and B20 DSPs preserving software compatibility for easy migration.
The 128-bit ConnX 110 DSP and 256-bit ConnX 120 DSP feature an N-way programming model an, like the rest of the Tensilica DSP portfolio, support the Tensilica Instruction Extension (TIE) language, which allows customers to tailor the instruction set, add specialised data types, and implement tightly integrated interfaces between the DSP and external logic.
The new DSPs are supported by a comprehensive set of complex math library functions in the NatureDSP, Eigen and Radar libraries. As with all existing ConnX DSPs, they are automotive-ready with full ISO 26262 compliance to ASIL-D with FlexLock or to ASIL-B.
The Tensilica ConnX 110 and 120 DSPs have an optimised instruction set for radar, lidar and communications applications. They also feature optional acceleration operations for linear-feedback shift, convolutional encoding, single peak search and dual peak search. The 128-bit (ConnX 110) and 256-bit (ConnX 120) SIMD are suitable for complex math operations based on eight-, 16- and 32-bit fixed-point and half-, standard- and double-precision floating-point.
The ConnX 120 additionally offers Viterbi and Turbo decoders.
NXP uses Cadence Tensilica DSP cores for its ADAS (advanced driver assistance system) product offerings, said Robert Dunnigan, director program management ADAS at NXP Semiconductors.
Another customer, indie Semiconductor develops multiple sensor modalities “in the pursuit of the uncrashable car”. Lionel Federspiel, executive vice president of engineering for indie Semiconductor, commented: “Cadence’s Tensilica ConnX processor family in conjunction with indie’s architecture is ideally suited to implement unique design solutions with high performance, low power, and gate count optimisation. As a pure-play automotive solutions innovator, quality and reliability are essential to the success of our products.”
“Radar and communications processing trends require solutions that perform more processing in less time,” explained David Glasco, vice president of research and development for Tensilica IP at Cadence. “Automotive radar demands multi-antenna, high-resolution systems with rapid response. Similarly, 5G wireless communications requires much higher data rates and lower latencies than previous generations. The Tensilica ConnX 110 and ConnX 120 DSPs meet these demands by extending the already-efficient processing capability of the ConnX DSPs and enhancing them with even more fixed- and floating-point complex data processing capacity at low power and area.”
