Akida architecture SoC places AI at the edge

Claiming to be the first company to bring a production spiking neural network architecture, the Akida Neuromorphic system-on-chip (NSoC), to market, BrainChip describes the NSoC as suitable for edge applications such as advanced driver assistance systems (ADAS), autonomous vehicles, drones, vision-guided robotics, surveillance and machine vision systems.   

The Akida NSoC is small, low cost and low power, adds the company. It is scalable, allowing users to network many Akida devices together to perform complex neural network training and inferencing for many markets including cybersecurity, financial technology and agricultural technology.

“The artificial intelligence acceleration chipset marketplace is expected to surpass US$60 billion by 2025,” said Aditya Kaul, research director at Tractica. He added: “Neuromorphic computing holds significant promise to accelerate AI, especially for low-power applications. As many of the technical hurdles are resolved, the industry will see the deployment of a new class of AI-optimised hardware over the next few years.”

The Akida NSoC uses a pure CMOS logic process, ensuring high yields and low cost. Spiking neural networks (SNNs) are inherently lower power than traditional convolutional neural networks (CNNs), as they replace the math-intensive convolutions and back-propagation training methods with biologically inspired neuron functions and feed-forward training methodologies.

BrainChip’s research has determined the optimal neuron model and training methods, bringing unprecedented efficiency and accuracy. Each Akida NSoC has effectively 1.2 million neurons and 10 billion synapses, representing 100 times better efficiency than neuromorphic test chips from Intel and IBM. Comparisons to leading CNN accelerator devices show similar performance gains of an order of magnitude better images/second/watt running industry standard benchmarks such as CIFAR-10 with comparable accuracy.

The Akida NSoC is designed for use as a standalone embedded accelerator or as a co-processor. It includes sensor interfaces for traditional pixel-based imaging, dynamic vision sensors (DVS), Lidar, audio, and analogue signals. It also has high-speed data interfaces such as PCI-Express, USB, and Ethernet. Embedded in the NSoC are data-to-spike converters designed to optimally convert popular data formats into spikes to train and be processed by the Akida Neuron fabric.

Spiking neural networks are inherently feed-forward dataflows, for both training and inference. Ingrained within the Akida neuron model are innovative training methodologies for supervised and unsupervised training. In the supervised mode, the initial layers of the network train themselves autonomously, while in the final fully-connected layers, labels can be applied, enabling these networks to function as classification networks. The Akida NSoC is designed to allow off-chip training in the Akida development environment, or on-chip training. An on-chip CPU is used to control the configuration of the Akida Neuron Fabric as well as off-chip communication of metadata.

The Akida development environment is available now for early access customers to begin the creation, training, and testing of spiking neural networks targeting the Akida NSoC. The Akida NSoC is expected to begin sampling in Q3 2019.

http://www.brainchip.com.

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Q-Free and Silicon Labs develop sensor to find a parking spot

Q-Free and Silicon Labs have collaborated on a new outdoor parking IoT sensor that helps drivers find vacant parking places in towns. The companies have created Q-Free’s ParQSense smart parking sensor, which uses the Silicon Labs’ EZR32WG Wonder Gecko wireless microcontroller for control and sub-GHz connectivity. The sensor was deployed as a pilot this year in the UK, Netherlands, Sweden, Norway and North America, and will be released for commercial use this month.

Q-Free has focused its resources on developing ways to reduce traffic flows. It provides a range of transportation technologies including electronic tolling, vehicle counters, surveillance technologies and parking management solutions. The ParQSense smart parking sensor is one of the company’s first sensor products to support outdoor parking needs. According to an INRIX study, 20 per cent of traffic in urban areas can be attributed to drivers searching for parking spots.

“To develop an IoT sensor solution for outdoor parking that would succeed in today’s market, we had to deliver a combination of low-power, long-range wireless connectivity and high performance,” said Brage Blekken, a project manager in Q-Free’s R&D department. “Silicon Labs helped us overcome this challenge by providing best-in-class wireless technology capable of transmitting data over long distances in the sub-GHz band,” he added.

Many existing outdoor parking sensors on the market had accuracy limitations, and struggled with wireless capabilities and interference from cellular networks commonly associated with urban environments, reports Q-Free.

The Q-Free ParQSense option uses dual radar and magnetic field technology to sense with 99+ per cent accuracy whether a vehicle is present in a parking space. The application transmits data to centralised base stations over long distances using narrowband sub-GHz wireless connectivity.

Q-Free supplies intelligent transportation systems comprising tolling, parking, info-mobility, traffic management and C -ITS/connected vehicle solutions. It was founded in 1984 and headquartered in Trondheim, Norway, the company has over 400 employees, offices in 18 countries.

Silicon Labs provides silicon and software for the internet of things (IoT), internet infrastructure, industrial automation, consumer and automotive markets.

http://www.silabs.com

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Single-chip motor drivers simplify flexible control logic

Low-to-mid-power motor controls in the seven to 45V range, can be simplified with the STSPIN830 and STSPIN840 single-chip drivers, claims STMicroelectronics. The drivers contain flexible control logic and low-RDS(ON) power switches for industrial applications, medical technology, and home appliances.

The STSPIN830 is designed for driving three-phase brushless DC motors and has a mode-setting pin that lets users control the three half bridges of the integrated power stage with direct U, V, and W pulse-width modulated (PWM) inputs, or by applying signals to each gate individually for higher control flexibility. A dedicated sense pin for each inverter leg simplifies setting up three-shunt or single-shunt current sensing for field-oriented control (FOC).

The STSPIN840 can drive two brushed DC motors or one larger motor leveraging ST’s paralleling concept, which allows the integrated full bridges to be configured as two separate bridges or as a single bridge using the two sets of MOSFETs in parallel for lower RDS(ON) and higher current rating.

Both drivers contain rich features, including PWM current-control circuitry with adjustable off-time, a convenient standby pin for power saving, and protection circuitry including non-dissipative overcurrent protection, short-circuit protection, under-voltage lockout, thermal shutdown, and interlocking to help create robust and reliable drives.

The integrated power stage of each device features ST-proprietary MOSFETs with low RDS(ON) of only 500 milliOhm to combine high efficiency with economy. The option to use the output bridges individually or connected in parallel, in the STSPIN840, helps trim the bill of materials for multi-motor applications.

According to ST, the integrated, flexible drivers enable more compact and cost-effective controls for industrial, robotic, medical, building-automation, and office-equipment applications. The STSPIN830 is suitable for factory-automation end-points, home appliances, small pumps, and fans for computer or general-purpose cooling. The STSPIN840 is for use in ATM and money-handling machines, multi-axis stage-lighting mechanisms, thermal printers, textile or sewing machines, and vending machines.

The STSPIN830 and STSPIN840 are both in production now, as 4.0 x 4.0mm QFN devices.

Two STM32 Nucleo expansion boards are also available from ST for product evaluation and to build functional prototypes using the STM32 Open Development Environment. The X-NUCLEO-IHM16M1 is for the STSPIN830 and the X-NUCLEO-IHM15A1 is for the STSPIN840 driver.

http://www.st.com/stspin

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Single power monitoring IC is industry-first, claims Microchip

Claimed to be the industry’s first two-channel device with native 16bit resolution, the PAC1932, and the three-channel PAC1933 are single power monitoring ICs by Microchip.

The power monitoring devices measure from 0 to 32V on a single chip, enabling designers to improve power measurement accuracy. The two-channel device is believed to be the industry’s first with native 16bit resolution, providing leading flexibility across a wide measurement range.   

The PAC1932/33 devices include what is needed to measure power on a single IC, integrating multiple channels in a single package for applications such as point of sale (PoS) systems, ATMs and building automation. This reduces costs for system designers, consolidates the bill of materials (BoM) as the measurement of sub-1.0 to 20V voltage rails normally require separate components to measure each rail efficiently, points out Microchip. The PAC1932/33 measure voltage rails up to 32V and also relieves developers from having to reconfigure measurement resolution between low and high current load events.

As the industry’s only two-channel device with 16-bit power measurement, the PAC1932 can measure without host intervention for 17 minutes, relieving developers from adjusting voltage or current range to measure power and energy. The devices include two 16bit analogue to digital converters (ADCs) that can measure voltage and current simultaneously, enabling developers to extract a true power measurement. According to Microchip, developers can design systems to efficiently save power.

As applications continue to seek ways to reduce power consumption, precision DC power measurement has grown as a key element for energy savings.  Microchip also offers a four-channel PAC1934 for improved power measurement for Windows 10 devices; the PAC1932/33 two and three channel power monitoring ICs offer improved power measurement for low voltage, high power applications in markets such as embedded computing and networking.

The PAC1932/33 work in conjunction with Linux and Windows 10 software drivers. The ADM00805 register-compatible evaluation board can be used to start development with a graphical user interface reporting Vsense, Vbus, power and accumulated power.

The two-channel PAC1932 and three-channel PAC1933 power monitoring ICs are available now for sampling and in volume production.

http://www.microchip.com/PAC1932

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