ICs & Semiconductors

Siemens integrates the u-blox ZED-F9K module into its V2X test fleet

Mon, Jun 10, 2019

The ZED-F9K turnkey solution minimizes the effort required to achieve decimeter-level positioning accuracy in automotive applications.

Thalwil, Switzerland – June 7, 2019 – u-blox (SIX:UBXN), a global provider of leading positioning and wireless communication technologies for the automotive, industrial, and consumer markets, is announcing that Siemens has integrated the u‑blox ZED-F9K (https://www.u-blox.com/en/product/zed-f9k-module) high precision dead reckoning module into its Toyota Prius V2X (vehicle-to-everything) test fleet. Siemens carried out live demonstrations of the technology at the ITS European Congress 2019 (https://2019.itsineurope.com/) in Eindhoven, the Netherlands.

As the only available source of absolute position, satellite-based positioning plays a crucial role in advanced driver automation systems and driverless vehicles. The same is true in V2X communication, in which vehicles continuously share their location and other information with other traffic participants – cars and pedestrians – as well as surrounding infrastructure,  improving road safety and reducing traffic congestion.

V2X test vehicles typically determine their position using high-end, expensive GNSS (Global Navigation Satellite Systems) receivers. While these provide highly accurate position information, they fail to realistically represent the hardware that will be deployed in vehicles produced for the mass market. By opting to use the ZED-F9K turnkey solution for high precision dead reckoning, Siemens was able to align the performance of their test fleet with real world conditions while also reducing the cost and the engineering effort required to develop their vehicles.

“We’ve had a very positive experience with u-blox’s ZED-F9K high precision dead reckoning solution. The product delivered strongly from the initial design-in to the data and performance in our first tests,” says Igor Passchier, Engineering fellow, Connected and Automated Driving at Siemens PLM Software. “It underscores the reputation of u‑blox as a trusted innovator in GNSS technology.”

“Our collaboration with Siemens shows the extent to which the ZED-F9K turnkey solution saves OEMs time, cost, and engineering effort while providing decimeter-level positioning performance,” says Alex Ngi, Product Strategy for Dead Reckoning, Product Center Positioning, u-blox. “For us, it has also been a welcome opportunity to contribute to solving the challenges in the autonomous driving ecosystem.”

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Chipset will accelerate mmWave 5G wireless infrastructure, says ADI

Fri, Jun 07, 2019

To reduce design requirements and complexity in the 5G cellular network infrastructure, Analog Device has announced the mmWave 5G chipset. It has, says Analog Devices, the highest available level of integration and includes the 16-channel ADMV4821 dual/single polarisation beamformer IC, the 16-channel ADMV4801 single-polarisation beamformer IC and the ADMV1017 mmWave up/down frequency converter (UDC).

The 24- to 30GHz beamforming + UDC chipset forms a 3GPP 5G NR-compliant mmWave front end to address the n261, n257 and n258 bands. The company claims that the optimised “Beams to Bits” signal chain is only available from ADI.

It can be difficult to design mmWave 5G systems from the ground up, explained Karim Hamed, general manager of microwave communications at Analog Devices. It requires balancing system-level challenges in performance, standards, and cost, he continued and this chipset leverages Analog Devices’ legacy in RF, microwave and mmWave communications infrastructure, and expertise across the RF spectrum “to simplify the design process for customers, reduce overall component count, and accelerate the path to 5G deployment,” he said.

The high channel density, coupled with the ability to support both single- and dual-polarization deployments, greatly increases system flexibility and reconfigurability for multiple 5G use cases while best-in-class equivalent isotropically radiated power (EIRP) extends radio range and density.

Analog Devices is a global high-performance analogue technology company, enabling customers to interpret the world with technologies that sense, measure, power and connect.

http://www.analog.com

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Microcontrollers have dual-core performance

Wed, Jun 05, 2019

Claimed to be the industry’s highest-performing Arm Cortex-M general-purpose microcontrollers, the STM32H7 devices combined dual-core operation with power-saving features and enhanced cyber protection, says STMicroelectronics.

The microcontrollers use a 480MHz version of the Cortex-M7, the highest performing member of the Cortex-M family and add a 240MHz Cortex-M4 core. The microcontrollers are based on ST’s smart architecture and have its efficient L1 cache and adaptive real-time ART Accelerator, to set new speed records at 1327 DMIPS and 3224 CoreMark executing from embedded Flash.

ST’s Chrom-ART Accelerator boosts graphics performance, while each core operates in its own power domain and can be turned off individually when not needed, to maximise power efficiency.

Developers can upgrade existing applications using the two cores, for example, adding a sophisticated user interface to a motor drive, formerly hosted on a single-core Cortex-M4, by migrating legacy code to the STM32H7 Cortex-M4 with the new graphics user interface (GUI) running on the Cortex-M7. Another example is to boost application performance by offloading intensive workloads such as neural networks, checksums, DSP filtering, or audio codecs.

The dual-core architecture also helps simplify code development and accelerate time to market in projects where user-interface code may be developed separately from real-time control or communication features.

STM32H7 microcontrollers have pre-installed keys and native secure services including Secure Firmware Install (SFI). SFI lets customers order standard products anywhere in the world and have the encrypted firmware delivered to an external programming company without exposing unencrypted code. Other protection includes built-in support for Secure Boot and Secure Firmware Update (SB-SFU) to protect over the air (OTA) upgrades and patches.

The STM32H7 microcontrollers have up to 2Mbyte flash and 1Mbyte SRAM on-chip to simplify the design of smart objects in industrial, consumer, and medical applications with real-time performance or artificial intelligence (AI) processing requirements. The Cortex-M7 level 1 cache and parallel and serial memory interfaces offer unlimited and fast access to external memory, adds ST.

The microcontrollers are also characterised by error code correction (ECC) for all flash and RAM to increase safety, multiple advanced 16-bit ADCs, external ambient-temperature range up to 125 degrees C allowing use in severe environments, an Ethernet controller and multiple FD-CAN controllers and ST’s high-resolution timer for generating precision waveforms.

STM32H7 dual-core microcontrollers are entering production and samples are available now.

http://www.st.com

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Quick-start software to develop embedded ADAS

Tue, Jun 04, 2019

Software has been developed specifically to use the hardware accelerators in Renesas Electronics’ R-Car V3H SoC for advanced driver assistance systems (ADAS) in automotive design.

To accelerate the development of ADAS, the Perception Quick Start software,  based on the R-Car V3H SoC delivers reference software for camera obstacle detection (COD), lidar obstacle detection (LOD), and road feature detection (RFD), deemed as three key recognition areas for sensor-based Level 2+ autonomous vehicle systems.

The COD reference software uses convolutional neural network (CNN) IP, a computer vision engine (CV-E), and image rendering (IMR) technology to detect 2D objects such as cars, trucks, buses, and pedestrians. It achieves approximately 30 frames per second.

The LOD software uses CNN-IP and CV-E to detect 3D objects, including cars and trucks. The LOD achieves approximately 15 frames per second with 3D bounding boxes at 50m.

The RFD reference software uses CNN-IP, CV-E, IMR, and a versatile pipeline engine (IMP) to identify drivable free space, lanes (crossable and uncrossable), road boundaries, and distances to lanes and nearest objects to support NCAP 2020. The RFD achieves approximately 30 frames per second.

The R-Car V3H SoCs deliver a combination of high computer vision performance and artificial intelligence (AI) processing at low power levels, for automotive front cameras in Level 2+ autonomous vehicles. To advance recognition technology, Renesas designed the SoCs with dedicated hardware accelerators for key algorithms including convolutional neural networks, dense optical flow, stereo disparity, and object classification. The Perception software provides an end-to-end pipeline reference for developers working with these complex accelerators which are both cost-effective and power-efficient, thereby allowing customers to advance an application design even if they have limited experience at using the accelerators. The reference software covers input from sensor or recorded data, all stages of processing and display output on a screen.

“Specialised hardware accelerators play an essential role in achieving the computer vision performance and accuracy required in embedded ADAS and autonomy applications while still meeting stringent in-vehicle power consumption limits,” said Tim Grai, director or automotive advanced systems innovation department, Renesas. “However, the complexity of these accelerators can present a steep learning curve. With the Perception Quick Start software, we are able to offer a set of application software along with the underlying primitives to simplify the use of these complex accelerators needed to achieve embedded ADAS.”

Renesas will demonstrate the Perception software at TU-Automotive Detroit (Booth C190, 5-6 June, Novi, Michigan, USA).

http://www.renesas.com

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