LED driver futureproofs with distortion-cancelling technology

Featuring a distortion cancelling input current shaping (ICS) circuit, the HVLED007 AC/DC LED driver enables energy-saving solid-state luminaires to comply with increasingly stringent lighting regulations, says STMicroelectronics.

The HVLED007 implements a peak current mode power factor control (PFC) control optimised for isolated high-power-factor quasi-resonant flyback converters. The ICS ensures an effectively sinusoidal input waveform with very low total harmonic distortion (THD) over the full load and input-voltage range, confirms ST. THD is below five per cent at full load. With near-unity power-factor capability and maximum energy efficiency over 90 per cent, the HVLED007 can be used for a single control IC to address multiple medium- and high-power LED-lighting applications up to 80W.

The HVLED007 is part of the HVLED family of digital ICs for driving LEDs directly from the rectified mains. The members are characterised by integration and support for economical primary-side regulation to lower the bill-of-materials costs and compact circuit size while enhancing system reliability and lighting performance, according to ST.

The electrical parameters of the HVLED007 are specified down to -40 degrees C, allowing use in outdoor lighting including street lighting as well as indoor applications. The totem-pole output stage can source and sink 600mA and 800mA respectively, enabling use in EN61000-3-2 compliant switched-mode power supplies up to 100W in addition to lighting applications. There is also short-circuit, overload, and over-voltage protection integrated in the HVLED007.

The HVLED007 is in production now in the industry-standard SO8 small-outline package.

http://www.st.com

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QuickLogic partners with Nuance Communications for voice recognition

Multi-core, voice-enabled SoCs, embedded FPGA IP, and endpoint AI provider, QuickLogic is partnering with conversational AI and ambient intelligence specialist, Nuance Communications, to deliver low power, wake word and voice command technology for power-sensitive applications, such as hearable and wearable devices.

Nuance’s voice recognition technology and QuickLogic’sEOS S3 voice and sensor processing platform will provide customers an end-to-end, reliable hardware and software voice recognition solution, says QuickLogic.

The low power Nuance voice recognition technology has been integrated with QuickLogic’s advanced EOS Voice and Sensor Processing SoC. The SoC’s architecture is claimed to enable the industry’s most advanced and compute intensive sensor processing capability at a fraction of the power consumption of competing technologies.

The Nuance technology provides the performance and low power consumption required for always-on wake word detection, and specifically supports the Alexa wake-word protocol. Technical enhancements enable it to improve voice recognition accuracy in difficult or noisy environments.

The integrated system supports always-on, always-listening fixed triggers, user defined triggers and phrases, and commands that can be accurately detected in silent to extremely noisy environments.

Scott Haylock, director of product marketing at QuickLogic, explains:”In response to customer demand, and the growing hearables market, we’ve augmented the EOS S3 OPEN Software Platform to include Nuance’s technology. This addition helps QuickLogic address the largest possible product mix of new and existing voice-controlled end-products.”

The EOS S3 platform with integrated Nuance voice processing is available now.

QuickLogic is a fabless semiconductor company that develops low power, multi-core semiconductor platforms and IP for artificial intelligence (AI), voice and sensor processing. It supplies embedded FPGA IP (eFPGA) for hardware acceleration and pre-processing, and heterogeneous multi-core SoCs that integrate eFPGA with other processors and peripherals. The Analytics Toolkit provides sensor algorithms using AI technology.

http://www.quicklogic.com 

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ON Semiconductor’s digital image sensor enables AI vision systems

Intelligent vision systems for viewing and artificial intelligence (AI) can be implemented using the low power 0.3Mpixel image sensor announced by ON Semiconductor.

The ARX3A0 digital image sensor has 0.3Mpixel resolution in a 1:1 aspect ratio. It can perform like a global shutter in many conditions, with up to 360 frames per second (fps) capture rate, yet with the size, performance and response levels that relate to being a back-side illuminated (BSI) rolling shutter sensor, explains ON Semiconductor. It has a small size, square format and high frame rate, making it particularly suitable for emerging machine vision, AI and augmented reality/virtual reality (AR/VR) applications, as well as small supplemental security cameras.

To meet the demands of applications that provide still or streaming images, the ARX3A0 is designed to deliver flexible, high-performance image capture with minimal power. It consumes less than 19mW when capturing images at 30 frames per second, and just 2.5mW when capturing one frame per second.

The 1/10 in square format enables low height modules and the 3.5 mm die size helps maximise the sensor’s field of view. It can therefore be used in emerging applications where orientation is not fixed but space is limited, such as AR/VR goggles, monitoring the wearer’s eye movement. Eye movement data can be used to adjust the image viewed and possibly mitigate motion sickness. Another application is simultaneous localisation and mapping (SLAM), which can also capitalise on the ARX3A0’s size and low power.

The monochrome sensor is based on a 560 by 560 active-pixel array featuring ON Semiconductor’s NIR+ technology, giving it high sensitivity at near IR wavelengths for performance in no-light conditions or when lighting is used that is non-detectable by the human eye.

Power management features include the ability to automatically wake from a low power mode when detecting motion or lighting changes in the scene. This allows the sensor to become the main source of wake for an entire camera system saving even more system power.

Gianluca Colli, vice president and general manager, Consumer Solution Division of Image Sensor Group at ON Semiconductor said: “As we approach an era where AI is becoming an integral part of vision-based systems, it becomes clear that we now share this world with a new kind of intelligence. The ARX3A0 has been designed for that new breed of machine, where vision is as integral to their operation as it is ours.”

The ARX3A0 is available in both chip scale package and reconstructed wafer die. Evaluation boards running on ON Semiconductor’s industry leading PC-based DevWare system and prototype modules are also available through ON Semiconductor and authorised distributors.

http://www.onsemi.com

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Synopsys claims industry’s first CXL IP for data-intensive SoCs

Low latency and high bandwidth are assured for artificial intelligence (AI), memory expansion and cloud computing, says Synopsys at the introduction of its DesignWare Compute Express Link (CXL) IP.

It is, according to Synopsys, the industry’s first CXL IP for data-intensive system of chips (SoCs). The IP suite consists of controller, PHY, and verification IP for AI, memory expansion, and high-end cloud computing system-on-chips (SoCs). The CXL protocol enables low-latency data communication between the SoC and general-purpose accelerators, memory expanders, and smart I/O devices requiring high-performance, heterogenous computing for data-intensive workloads. The DesignWare CXL IP is compliant with the CXL 1.1 specification and supports all three CXL protocols (CXL.io, CXL.cache, CXL.mem) and device types to meet specific application requirements.

The CXL IP is built on Synopsys’ DesignWare IP for PCI Express 5.0, which has been adopted by semiconductor companies across all key market segments, reports the company.

“Compute Express Link is a key enabler for next-generation heterogeneous computing architectures, where CPUs and accelerators work together to deliver the most advanced solutions,” said Dr. Debendra Das Sharma, Intel Fellow and director of I/O Technology and Standards at Intel.

Synopsys’ DesignWare CXL Controller helps designers achieve timing closure at 1GHz and provides a robust 512-bit architecture that supports x16 links for maximum CXL bandwidth. The CXL controller offers reliability, availability, serviceability (RAS) capabilities to help maintain data reliability, as well as successfully debug and resolve linkup issues. The 32GTerabytes per second PHY allows more than 36dB channel loss across power, voltage and temperature (PVT) variations for long-reach applications. The VC Verification IP for CXL verifies I/O, memory access, and coherency protocol features with built-in sequences, checks, and coverage for all link configurations up to 16 lanes and 32GTbytes per second data rates. SystemVerilog test suites for CXL accelerate verification closure and are available as source code.

Synopsys’ 32G PHY IP for CXL is available now in 16-, 10-, and 7nm FinFET processes. The CXL Controller and VC Verification IP for CXL are available now.

http://www.synopsys.com/designware

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