NIR sensor saves power for mobile 3D optical sensing systems

3D optical sensing applications such as face recognition, payment authentication can operate at much lower power than alternative implementations, using the CGSS130, CMOS global shutter sensor (CGSS) near infra red (NIR) image sensor by ams.

The CGSS130 enables battery-powered devices to run for longer between charges while supporting sophisticated sensor functions.

According to ams, the CGSS130 sensor is four times more sensitive to NIR wavelengths than other image sensors on the market today, and detects reflections from very low power IR emitters in 3D sensing systems. It is the IR emitter that consumes most of the power in face recognition and other 3D sensing applications, says ams, which means using the CGSS130 sensor will enable manufacturers to extend battery runtime in mobile devices.

The 1.3Mpixel sensor also creates the opportunity to implement face recognition in wearable devices and in other products which are powered by a very small battery, or to enable a new range of applications beyond face recognition as the increased sensitivity extends the measurement range for the same power budget.

Following ams’ partnership with CMOS image sensor supplier, SmartSens Technology, the first 3D active stereo vision (ASV) reference design based on the CGSS130 was produced. The 1.3Mpixel stacked BSI sensor offers the highest quantum efficiency at 940nm, claims ams and, by supplying all main parts of the 3D system (illumination, receiver, software) it enables superior system performance with lower costs and a faster time to market.

The stacked BSI process used to fabricate the CGSS global shutter image sensors, results in a small footprint of 3.8 x 4.2mm. The sensor produces monochrome images with an effective pixel array of 1080 x 1280 at a maximum frame rate of 120 frames per second. The high frame rate and global shutter operation produce clean images free of blur or other motion artefacts, says ams.

The sensor also offers a high dynamic range (HDR) mode in which it achieves dynamic range of more than 100dB. It also implements advanced functions such as external triggering, windowing, and horizontal or vertical mirroring.

The CGSS130 is available for sampling.

ams is demonstrating the CGSS130 at CES, in the Venetian Tower, Suite 236 / 30th floor.

https://ams.com

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STM32 SoC connects smart devices to the IoT using LoRa

STM32 microcontroller IP and enhanced Semtech radio are integrated on a single chip, the STM32WLE5. STMicroelectronics claims that this is the first LoRa SoC available for connecting smart devices to the IoT using long-distance wireless connections.

The STM32WLE5 SoC lets product developers create devices such as remote environmental sensors, meters, trackers, and process controllers that help efficiently manage energy and resources, continues the company.

The STM32WLE5 has multiple combines the low-power STM32 microcontroller design with a LoRa-compliant radio in one single-die and easy-to-use device. It has multiple ST patents pending, namely for radio power management architecture, and ST’s LoRaWAN software for wireless network communications has passed all regional certifications for use worldwide.

The SoC is available in a 5.0 x 5.0mm UFBGA73 package. It is fully integrated into the STM32 ecosystem, including STM32Cube software support, as well as a LoRaWAN stack certified for all regions and available in source-code format.

The integrated radio is based on Semtech SX126x IP and engineered with dual high-power and low-power transmitter modes that cover the sub-1GHz unlicensed frequency range from 150 to 960MHz, ensuring compatibility with LoRa networks around the world and in all territories.

Sensitivity down to -148dBm and two embedded power amplifiers with up to 15dBm and up to 22dBm maximum transmit power are available in the same package to maximise RF range.

In addition to embedded LoRa modulation, the STM32WLE5 is also capable of (G)FSK, (G)MSK, and BPSK modulation, allowing alternative protocols including proprietary protocols. High RF performance with low power consumption ensures reliable wireless connectivity and which includes dynamic voltage scaling and ST’s adaptive real-time ART Accelerator for zero-wait execution from flash.

Flash options are 64, 128 and 256kbyte for a choice of optimal code and data storage density.

Users also benefit from the built-in cyber-security features of STM32L4 microcontrollers, including hardware public key accelerator (PKA), true random number generator (TRNG), sector protection against read/write operation (PCROP), and support for the latest cryptographic algorithms including RSA.

http://www.st.com

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Bluetooth LE Audio codec is first for power-sensitive audio says Synopsys

Optimised for Synopsys’ ARC processor IP, a low complexity communication codec (LC3) has been developed by Synopsys with the Fraunhofer Institute for Integrated Circuits (IIS).

The new codec is designed to comply with the forthcoming Bluetooth LC3 audio codec specification and is optimised to deliver high-quality audio and voice playback in battery-powered devices incorporating ARC EM and HS DSP processors, says Synopsys.

It has been added to Synopsys’ portfolio of DesignWare ARC audio codecs and post-processing software supporting popular audio standards. It also extends Synopsys’ DesignWare Bluetooth Low Energy IP offering.

The 32-bit DesignWare ARC EM and HS DSP processors are based on the scalable ARCv2DSP Instruction Set Architecture (ISA) and integrate RISC and DSP capabilities for a flexible processing architecture. The ARC EM DSP processors offer low power and what is claimed to be industry-leading performance efficiency while the multi-core-capable ARC HS DSP processors combine high-performance control and high-efficiency digital signal processing. All ARC processors are supported by the ARC MetaWare Development Toolkit, which includes a library of DSP functions to allow software engineers to rapidly implement algorithms from standard DSP building blocks. ARC processors and the LC3 codec can be combined with Synopsys’ Bluetooth 5.1-compliant DesignWare Bluetooth Low Energy IP to deliver power-efficient, high-quality wireless audio capability for smart IoT and other Bluetooth-enabled devices.

The LC3 codec is an important feature of the Bluetooth LE Audio specification to be released by the Bluetooth Special Interest Group (SIG) that enables system on chip (SoC) designers to efficiently implement high-quality voice and audio streaming in a wide range of applications, including mobile, wearables, and home automation.

The LC3 codec for ARC processors is based on an implementation by Fraunhofer IIS that is designed to meet Bluetooth SIG requirements. The LC3 codec, running on ARC EM and HS DSP processors, allows designers to rapidly integrate a complete, pre-verified hardware and software solution for voice and speech processing into Bluetooth-enabled devices requiring minimal energy consumption, explains Synopsys.

“The rapid growth of wearable devices requiring high-quality Bluetooth audio streaming is driving the need for power-efficient processor IP with DSP capabilities that can meet intensive computation requirements of voice and audio applications. Those applications require an optimised codec providing state-of-the art voice and audio quality at minimum computational complexity,” said Manfred Lutzky, head of Audio for Communications at Fraunhofer IIS. “By porting the LC3 codec to the DSP-enhanced ARC processors, Synopsys is enabling customers to quickly implement LC3 codec functionality in their low-power SoCs. We look forward to continuing our collaboration with Synopsys so that the LC3 codec for ARC processors continues to incorporate the latest updates,” he added.

“The fact that the LC3 codec can provide very high-quality audio even at low bit rates makes it a key feature of the upcoming LE Audio standard,” said Mark Powell, chief executive officer of the Bluetooth SIG. “

John Koeter, senior vice president of marketing for IP at Synopsys, said: “Designed to process high-quality audio streams and deliver superior sound, the LC3 codec for ARC processors provides designers with a certified codec that reduces the integration time and testing required to deliver superior quality audio for Bluetooth streaming applications.”

The Bluetooth LC3 codec is available now from Synopsys with DSP-enhanced ARC EMxD and HS4xD processors.

http://www.synopsys.com

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i.MX applications processor has NPU for advanced ML at the edge

The latest member of NXP’s EdgeVerse portfolio has been launched at CES in Las Vegas (7 to 10 January). The i.MX 8M Plus heterogeneous application processor is the first i.MX family to integrate a dedicated neural processing unit (NPU) for advanced machine learning (ML) inference at the industrial and IoT (Internet-of-Things) edge.

The NPU delivers 2.3Toperations per second and is combined with a quad-core Arm Cortex-A53 sub-system running at up to 2GHz. There is also an independent real-time sub-system with an 800MHz Cortex-M7, an 800MHz audio DSP for voice and natural language processing, a dual camera image signal processors (ISP) and a 3D GPU for rich graphics rendering. The i.MX 8M will enable edge devices to make intelligent decisions locally by learning and inferring inputs with little or no human intervention, says NXP. Target applications are people and object recognition for public safety, industrial machine vision, robotics, hand gesture, and emotion detection with natural language processing for seamless human-to-device interaction with fast response time and high accuracy.
The applications processor is based on 14nm LPC FinFET process technology. The i.MX 8M Plus can execute multiple, highly-complex neural networks simultaneously, these include multi-object identification, speech recognition of 40,000+ English words and medical imaging. The NPU is capable of processing Mobilenet, a popular image classification network at over 500 images per second, adds NXP.
Developers can off-load machine learning inference functions to the NPU, allowing the Cortex-A and Cortex-M cores, DSP and GPUs to execute other system-level or user applications tasks. The vision pipeline is anchored by dual integrated ISPs that support two high-definition cameras for real-time stereo vision or a single 12Mpixel resolution camera and includes high dynamic range (HDR) and fisheye lens correction for real-time image processing in surveillance, smart retail applications, robot vision and home health monitors.
For voice applications, the i.MX 8M Plus integrates a HiFi 4 DSP that enhances natural language processing with pre- and post-processing of voice streams. The Cortex-M7 domain can be used to run real-time response systems while the applications processor domain executes complex non-real-time applications. It reduces overall system-level power consumption by turning off the application processor domain while keeping only the Cortex-M domain alive for wake word detection. For advanced multimedia, and video processing, the processor can compress multiple video feeds using the H.265 or H.264 HD video encoder and decoder for cloud streaming or local storage, 3D/2D graphics, and Immersiv3D audio with Dolby Atmos and DTS:X.

In industrial scenarios, it can be used in machines that inspect, measure, precisely identify objects and enable predictive maintenance by detecting anomalies in machine operation. It can also support making the factory human machine interfaces (HMIs) more intuitive and secure by combining accurate face recognition with voice/command recognition and gesture recognition. The i.MX 8M Plus integrates Gigabit Ethernet with time sensitive networking (TSN), which combined with Arm Cortex M7 real-time processing provides deterministic wired network connectivity and processing, NXP explains.
Other features for industrial use are error correction code (ECC) for internal memories and the DDR interface.
The family is expected to be qualified to meet the stringent industrial temperature range (-40 to +105 degrees C ambient).

NXP at CES 2020: booth, CP-18
http://www.nxp.com  

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