Clock generators, buffers and PCIe clocks and buffers are AEC-Q100-qualified

To meet the demanding clocking needs of in-vehicle systems, Silicon Labs believes it now offers the industry’s broadest portfolio of automotive grade timing solutions, as it introduces AEC-Q100-qualified timing devices, the Si5332 any-frequency programmable clock generators, Si5225x PCIe Gen1/2/3/4/5 clocks, Si5325x PCIe buffers and Si5335x fanout clock buffers.

These timing devices help automotive OEMs and Tier 1 suppliers simplify clock tree design, reduce system points of failure, increase system reliability and optimise the performance of high-speed serial data transfer. The timing devices target automotive camera sub-systems, radar and lidar sensors, advanced driver assistance systems (ADAS), autonomous driving control units, driver monitoring cameras, infotainment systems, Ethernet switches, and GPS and 5G connectivity.

Rather than using more quartz-based components to satisfy a growing list of timing requirements, developers now have the option to simplify their clock tree designs and increase system reliability using the company’s automotive-grade low-jitter, any-frequency clock generators and buffers.

Quartz crystal and oscillator timing devices can be prone to shock and vibration failure as well as start-up issues, explains Silicon Labs. Clocking requirements increase in demand as automotive infotainment platforms continue to adopt new features and ADAS systems increase complexity and data acquisition rates.

Automotive in-vehicle applications require a higher operating temperature range (Automotive Grade 2, -40 to +105 degrees C) and qualification to AEC-Q100 automotive standards.

The Si5332 clock leverages Silicon Labs’ MultiSynth technology to provide any-frequency, any-output clock synthesis with more than 60 per cent lower jitter than competing automotive clocks, says the company. Supporting up to eight clock outputs, selectable signal formats per output clock (LVDS, LVPECL, HCSL, LVCMOS) and independent 1.8-3.3V VDDO, the Si5332 clock interfaces to a range of FPGAs, ASICs, Ethernet switches/PHYs, processors, GPUs, SoCs, and PCIe Gen1/2/3/4/5 and NVLink SerDes. Clock synthesis, clock distribution and format/level translation are consolidated on-chip, enabling optimised single-IC clock tree solutions for automotive designs.

The Si5332 clock generators and Si5335x clock buffers are configurable and customisable using Silicon Labs’ flexible ClockBuilder Pro software, enabling developers to create optimised solutions that exactly match specific clock tree requirements, with samples shipping in less than two weeks.

Samples and production quantities of automotive grade Si5332 clock generators, Si5225x PCIe clocks, Si5325x PCIe buffers and Si5335x clock buffers are available now in 32-QFN and 40-QFN package options.

Evaluation boards (EVBs) for automotive grade timing devices are also available. The EVBs work seamlessly with ClockBuilder Pro, enabling developers to quickly customize a device and evaluate performance.

http://www.silabs.com

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NFC tags can be used on metallic surfaces

Flexible, ferrite-based NFC inlays and tags in the Block On-Metal range by Smartrac Technology group are suitable for items with metallic surfaces need to be identified or interacted with.

The tags can be used on industrial, retail and business to consumer (B2C) applications where metallic surfaces need to be identified or interacted with.

The Block On-Metal tags combine an antenna design with a thin layer of flexible ferrite material, which isolates the magnetic field from the metal surface. Ferrite redirects the reader’s inductive field and prevents energy from being wasted as heat within the metallic surface.

They can be used for industrial, retail and consumer, asset management, brand protection, secure product authentication, and payment. They can also be used for the identification and provision of a digital identity to many items – from metallic components to spare parts, signs, tools, even machines and domestic items. The tags have a die cut size of 50 x 50mm (1.96 x 1.96-inches) for the standard tag. Block On-Metal tags are suitable for roll-to-roll manufacturing processes, which makes onward processing much easier and more cost-effective, and allows converters to overprint the inlays if required.

Block On-Metal tags are equipped with the newest member of NXP’s Slix product family, the ICode Slix2 IC. This chip complies with the NFC Forum Type 5 standard, is backwards-compatible to Slix and offers an increased user memory size. It also has NXP originality signature, increased speed for inventory management, and increased read range due to superior resistance to detuning effects. Additional notable features of the ICode Slix2 IC are flexible user memory segmentation with separate access conditions, a password-protected on-chip service cycle counter and a 2.5kbit user memory size.

Block On-Metal will become available in high volumes from Q4 2019.

Smartrac provides both ready-made and customised offerings. Its portfolio is used in an array of applications such as animal identification, automation, automotive, brand protection, customer experience, industry, library and media management, logistics, retail and supply chain management.

http://www.smartrac-group.com

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Intel ships Stratix 10 DX FPGAs to accelerate data centre workloads

FPGAs designed to support Intel Ultra Path Interconnect (UPI), PCI-Express (PCIe) Gen4 x16 and a new controller for Intel Optane technology are shipping from Intel. The Stratix 10 DX FPGAs are designed to boost acceleration of workloads in the cloud and enterprise when used with Intel’s data centre products.

The Stratix 10 DX FPGAs have new interfaces, including the option to support select Intel Optane DC persistent memory dual in-line memory modules (DIMMs). They increase bandwidth and provide coherent memory expansion and hardware acceleration for future Intel Xeon Scalable processors, reveals the company.

Data centre customers are using hardware accelerators, like FPGAs, for more computational speed from server systems running networking and cloud-based applications such as artificial intelligence (AI) training / inferencing or database-related workloads. The effective performance of hardware accelerators depends heavily on the communications bandwidth and latency between one or more server CPUs, available system memory and any attached accelerator, such as a graphics processor unit or application-specific standard products.

Diverting tasks to accelerators frees up CPU cores to become available to work on other higher priority workloads, increasing data centre operator efficiency, says Intel.

Stratix 10 DX FPGAs’ features include a memory controller which supports up to eight Intel Optane DC persistent memory modules per FPGA (up to 4Tbytes of non-volatile memory). There is also 100Gbyte per second Ethernet, HBM2 memory stacks and a quad-core Arm Cortex-A53 processor sub-system with peripherals.

The Stratix 10 DX joins the Stratix 10 GX, Stratix 10 SX SoC FPGAs, Stratix 10 TX and Stratix 10 MX FPGAs.

http://www.intel.com

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Isolated technology driver maximises power efficiency for industry 4.0

Analog Devices claims to maximise efficiency and minimise electromagnetic (EM) emissions of motion systems as customers migrate to higher density automation, at the launch of the ADuM4122 isolated, dual-drive strength output driver. It uses iCoupler technology.

Improvements in motor efficiency can improve economic and environmental benefits in industrial automation and IoT within smart factories, reports Analog Devices.

The ADuM4122 is designed to satisfy the growing demand for intelligent technology and features within systems. It accomplishes this by controlling how fast or slow a MOSFET or IGBT turns on or off by user command, on the fly, to control motor currents, says Analog Devices.

Mack Lund, director of the Interface and Isolation Technology Group at Analog Devices explains that users can dynamically move from a slower to a faster switching transition, optimising EM emissions without sacrificing efficiency. “In short, you no longer have to leave performance on the table when trying to achieve lower emissions and power consumption,” he said.

The ADuM4122 is a simple dual-drive strength output driver that efficiently toggles between two slew rates controlled by a digital signal. It is in an eight-pin SOIC, making it smaller than existing discrete or complex integrated solutions that have 20 or more pins, says Analog Devices.

An evaluation board is also available.

The ADuM4122 further improves system capabilities with high common-mode transient immunity and low propagation delay for high performance applications such as motion control, robotics and energy.

http://www.analog.com

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