ST scales STM32 microprocessors for cost-efficient, low-power, and flexible performance
ST has introduced STM32MP21 microprocessors (MPUs) for cost-aware edge applications in smart factories, smart homes, and smart cities, combining advanced cores and peripherals with strong security targeting SESIP Level 3 and PCI pre-certification.
Extending ST’s STM32MP2 series, the new MPUs with a 1.5GHz 64-bit Arm Cortex-A35 core and advanced 32-bit Cortex-M33 at 300MHz ensure fast execution times with flexibility. The two cores handle complex tasks and real-time control, adding the opportunity for boot processing on the Cortex-M33 to launch services quickly and accelerate system wake-up from power-saving modes.
Bringing a focused feature set, STM32MP21 MPUs integrate MIPI CSI-2 and image signal processing (ISP) pipeline for machine-vision applications such as industrial inspection and barcode or QR-code readers. Also, two Gigabit Ethernet ports with Time-Sensitive Networking (TSN) support applications that need determinism, low latency, jitter-free communication, synchronisation, and scheduling, including industrial automation, robotics, functional safety, and sensor-data capture.
On top of DDR4/LPDDR4 DRAM support, the series supports DDR3L memory, enabling designers to optimise system performance, footprint and BoM, while maintaining competitive pricing and secure supply amid ongoing DDR4/LPDDR4 shortages and price surges.
The security architecture shared throughout the STM32MP2 series is built to comply with increasingly strengthened regulations worldwide, including the incoming EU Cyber Resilience Act (CRA). The MPUs’ SESIP Level 3 security-assurance target aligns with CRA implementation guidelines that specify AVA_VAN.2 or AVA_VAN.3 resistance for Important (Class II) products and at least AVA_VAN.4 for Critical products. Customers’ applications are protected even before delivery with ST’s in-factory secure secret provisioning (SSP) to load the unique identity and immutable passwords for authentication and attestation. A secure hardware cryptographic accelerator inhibits physical attacks, while supporting secure boot and applicative needs. Code isolation with Arm TrustZone protects startup and sensitive processes, completed with hardware protection of memory and peripherals leveraging ST’s proprietary resource isolation framework (RIF) to prevent tampering.
Product developers can take advantage of the STM32 ecosystem that provides extensive software and tools for building and testing MPU applications. These include ST Edge AI desktop and cloud tools, OpenSTLinux and software expansion packages, as well as evaluation boards, the STM32MP215F-DK Discovery kit, and adapter boards. On top of the well-established OpenSTLinux distribution, with Yocto and Buildroot flavors, a bare metal offer will be available for the STM32MP2 series in 2026, as presented previously for the STM32MP13 series.
The new STPMIC2L power-management IC (PMIC) provides the power supplies needed for the STM32MP21 and DRAM, to simplify system design and minimise circuit footprint. Additional PMICs are available, suited to other combinations of STM32 MPU and peripherals, and are described online at ST’s website. CAD resources in the STM32 MPU product pages give access to Altium projects for the most commonly used configurations to further accelerate customers’ designs.
STM32MP21 package options include 8mm x 8mm 225-pin and 10mm x 10mm 361-pin VFBGAs suited to 6-layer high-density interconnect (HDI) boards. In addition, a 11mm x 11mm 273-pin VFBGA and 14mm x 14mm 289-pin TFBGA are available for cost-conscious 4-layer boards. The 10mm x 10mm VFBGA361 is pin-to-pin compatible across the entire STM32MP2 series.
