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Renesas collaborates with Xilinx on Versal ACAP reference designs

Wed, Dec 18, 2019

Power semiconductors from Renesas and timing solutions from its subsidiary, IDT, support the Xilinx Versal adaptive compute acceleration platform (ACAP) devices featured on the Xilinx VCK190 evaluation kit and the Renesas VERSALDEMO1Z power reference board.

The 7nm process Versal is the industry’s first ACAP platform that addresses applications in data centre, automotive, 5G wireless, and wired and defence markets, says Renesas.

The company provides turnkey clocking and power reference boards that help system developers jumpstart Versal ACAP designs. For developers creating complex, compute-intensive systems that demand flexible and high-performance power delivery and timing, the collaboration has resulted in pre-validated reference designs that allow developers to rapidly develop and optimise system performance and power efficiency.

The Xilinx VCK190 is the first Versal AI Core series evaluation kit. It is based on the VC1902 Versal AI Core series ACAP, providing AI inference and signal processing throughput for cloud, network, and edge applications. The kit features complete timing solutions including the 8A34001 ClockMatrix system synchroniser for IEEE1588 and eCPRI applications, 8T49N240/8T49N241 Universal Frequency Translators for low-jitter and flexible transceiver SerDes clocking, a programmable clock generator and clock buffer/multiplexer for PCIe interface.

The Renesas VERSALDEMO1Z power reference board provides full power rails for the Versal ACAP’s adaptable engines, AI engines, scalar engines, and external DDR memory. The board is a complete power supply solution featuring one member of the ISL68xxx digital multiphase PWM controller family and multiple members of the ISL99xxx smart power stage family to provide high-efficiency and scalable Vcore power. There are also ISL91211A power management IC (PMIC) and DC/DC regulators.

The Renesas VERSALDEMO1Z power reference board is available now from Renesas Electronics.

Renesas Electronics delivers semiconductors that enable billions of connected, intelligent devices, microcontrollers, analogue, power, and SoC products for automotive, industrial, home electronics, office automation, and information communication technology applications.

http://renesas.com

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MEMS analogue accelerometers tolerate temperature fluctuations

Wed, Dec 18, 2019

Enhanced temperature performance, low cost, general purpose, analogue, surface mount accelerometers have been launched by Silicon Designs. There are eight models in the Model 1522 series ranging from ±2g to ±400g.

According to Silicon Designs, the Model 1522 series provides reliable vibration and acceleration measurements within more thermally demanding zero-to-medium frequency applications. These can be characterised by large or rapid temperature fluctuations or, where high or low temperature extremes must otherwise be maintained over an extended time frame. The accelerometers also provide superior bias and scale factor performance over an expanded operating temperature range of -55 to +125 degrees C, says the company, further responding to both AC and DC acceleration.

The Model 1522’s robust design combines a micro-machined capacitive sense element together with a custom integrated circuit (IC). The circuit includes both a sense amplifier and a ±4V differential output stage. An additional integral temperature sensor facilitates the self-correction of any previously characterised bias and scale factor temperature dependence for any one particular accelerometer. All accelerometer internal components are housed within a hermetically-sealed and nitrogen-damped LCC surface mount package. Units are also RoHS-compliant.

Each Model 1522 series accelerometer is made to be virtually identical within a given g-range, says Silicon Designs. Units are tested in-house, programmed, calibrated and verified within a climate chamber environment for continued measurement accuracy and reliability, particularly under thermally volatile conditions. Each accelerometer is marked with a serial number for traceability and is shipped with an initial test report. The test report lists measured bias, scale factor, bias and scale factor temperature coefficients, linearity, operating current and DV frequency response/phase plots.

The accelerometers are in production and available for immediate shipment.

Silicon Designs was founded in 1983 with the goal of improving the accepted design standard for traditional MEMS capacitive accelerometers. At that time, industrial-grade accelerometers were bulky, fragile and costly. The engineering team at Silicon Designs listened to customers who required more compact, sensitive, rugged and reasonably priced accelerometer modules and chips, which also offered high performance.

https://www.silicondesigns.com

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Fingerprint sensor authenticates via smartphone’s display

Thu, Dec 12, 2019

Believed to be the largest surface fingerprint-on-display (FoD) module, designed with organic printed electronics, a four-finger authentication module by Isorg will be demonstrated at CES 2020.

It is expected to bring higher data security to mobile devices, says the company. The company specialises in organic photodetectors (OPDs) and large-area image sensors and will demonstrate the full-screen Fingerprint-on-Display (FoD) module which supports up to four fingers simultaneously touching a smartphone display.

Isorg’s FoD module responds to demands from OEMs and end-users for higher security technologies that can support large surface area fingerprint sensing. Solutions currently available are restricted to single finger identification within a surface area of less than 10 x 10mm. Isorg’s FoD module supports one- to four-finger authentication across the entire dimensions of the six-inch (152mm) smartphone display (or even larger). The module is very thin, less than 0.3mm thick, so integration into smartphones is made easy for OEMs, added the company.

In addition to the image sensor, the module includes optimised thin film optical filters developed in-house and driving electronics, as well as software from Isorg’ industrial partners covering the interface with smartphone OS and the matching algorithm. The scalable FoD is compatible with foldable displays, added the company.

Isorg’s four-finger authentication capability paves the way for secure smartphone mobile banking and payments, personal health monitoring and remote home control applications, including enhanced data protection for wearables, such as access control. By enabling more identification data to be captured with multiple fingers, it significantly reduces the risk of false finger identity theft, in addition to the ease of use by being able to place fingerprints anywhere on the display.

Smartphone OEMs will be able to sample Isorg’s Fingerprint-on-Display module in spring 2020. In parallel, Isorg is also extending development of its FoD for application in the biometrics security market, aimed at meeting growing security needs in access control, border control and other identity access management areas, including mobile ID applications.

The live demo will take place at Eureka Park Tech West – Sands Expo, Level 1, Hall G booth #50463 at CES Las Vegas (7 to 10 January 2020)

http://www.isorg.fr

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Microchip delivers early access for RISC-V enables PolarFire SoC FPGAs

Wed, Dec 11, 2019

At this week’s RISC-V Summit in San Jose, California, USA, Microchip has announced an early access program for its PolarFire SoC.

Explaining the reason behind the programme, Microchip cited the trend towards compute-intensive gateways and edge devices which is driving the integration of traditional deterministic control applications with the additional embedded processing capabilities needed for smart and secure connected systems. The early access programme for the PolarFire SoC FPGA offers what is claimed to be the world’s first hardened real-time, Linux-capable, RISC-V-based microprocessor sub-system on the mid-range PolarFire FPGA family. According to Microchip, this brings low power consumption, thermal efficiency and defence-grade security to embedded systems.

Qualified customers can start designing now with Microchip’s Libero SoC 12.3 FPGA design suite and SoftConsole 6.2 integrated development environment (IDE) for the embedded developer. Customers can also debug embedded applications using Renode, a virtual model of the microprocessor sub-system.

The company believes that, in addition to driving innovation in the embedded space, as designers develop a new class of power-efficient applications, there will also be the opportunities to add “unprecedented capabilities” at the edge of the network for communications, defence, medical and industrial automation.

PolarFire SoC delivers power efficiency that is up to 50 per cent lower power than competitive devices in the industry, said Microchip. This reduces the bill of materials by eliminating the need for fans and heat sinks. It is believed to be the first SoC FPGA with a deterministic, coherent RISC-V CPU cluster and a deterministic L2 memory subsystem enabling Linux plus real-time applications.

The support of real-time and rich operating systems such as Linux is part of Microchip’s growing Mi-V RISC-V ecosystem, a comprehensive suite of tools and design resources developed by Microchip and third parties to support RISC-V designs. Ecosystem partners ready to support PolarFire SoC include WindRiver, Mentor Graphics, WolfSSL, ExpressLogic, Veridify, Hex-Five, and FreeRTOS as well as development tools from IAR systems and AdaCore.

http://www.microchip.com

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Renesas collaborates with Xilinx on Versal ACAP reference designs

MEMS analogue accelerometers tolerate temperature fluctuations

Fingerprint sensor authenticates via smartphone’s display

Microchip delivers early access for RISC-V enables PolarFire SoC FPGAs

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