Renesas adds to control plane options with I3C bus extension products

I3C multiplexers and I/O expanders from Renesas Electronics deliver 12.5MHz in a small footprint, claims the company.

There are four new I3C Basic bus extension products for control plane designs for data centre and server applications, as well as enterprise, factory automation and communications equipment. The IMX3102 2:1 bus multiplexer, IMX3112 1:2 bus expander, and IXP3114 and IXP3104 1:4 general-purpose I/O expanders support up to 12.5MHz speeds as well as integrated thermal sensor capability.

Engineers can use them when implementing I3C Basic as a system management bus in applications where there may be multiple masters, a large number of endpoint devices and long traces affecting bus complexity and signal integrity. The integrated thermal sensor allows the thermal management to be integrated into the bus design itself and can reduce the number of dedicated thermal sensor endpoints.

According to Renesas, next-gen compute architectures are leading the transition to I3C as the system management bus of choice, as a result of the JEDEC standard’s adoption of I3C Basic for the DDR5 memory sideband. The increase in memory subsystem complexity with distributed power management, telemetry and thermal management at the sub-channel level requires higher sideband bus bandwidth, observes the company.

Demand for advanced thermal control loops, security and component authentication, and more robust fault tolerance and recovery are driving the need for a high bandwidth interface across the entire server control plane. I3C Basic enables system management architectures to provide granular information about the server resource status during boot-up and runtime. This allows system managers to implement effective workload migration and server load balancing to “significantly optimise” server utilisation.

The IMX3102 2:1 bus multiplexer is suitable for designs where there may be two masters controlling a single peripheral or slave devices. The IMX3112 1:2 bus multiplexer supports designs where a single host is controlling two peripheral or slave devices. The general-purpose I/O expanders, IXP3114 (with temperature sensor) and IXP3104 1:4 (without temperature sensor), are designed for a host controller with up to four peripheral or slave devices.

The new I3C products feature integrated temperature sensors. Unexpected motherboard temperature increases can result in costly system failures. Positioning temperature sensors in multiple locations on the motherboard allows engineers to continuously monitor for potential temperature spikes and direct the CPU to take action to prevent a catastrophic event.

Additional features include a two-wire programmable I2C or I3C Basic bus serial interface, a single device load on the host bus and single 1.8V input power supply. The integrated temperature sensor accuracy is 0.5 degrees C with 0.25 degrees C resolution and the industrial operating temperature range is -40 to +125 degrees C.

The devices are supplied in a thermally enhanced, nine-pin PSON-8 package, measuring 2.0 x 3.0mm.

The I3C devices and evaluation boards are sampling now to qualified customers.

http://www.renesas.com

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Green Hills Software introduces software development tools for RISC-V 

Software development tools targeting 32- and 64-bit RISC-V processor architectures have been announced by Green Hills Software. The company announced availability and early customer adoption of its Multi integrated development environment (IDE), multi-core debugger, optimising C/C++ compilers and hardware JTAG probe for software developers targeting pre-silicon and silicon platforms using RISC-V.

The tools for RISC-V can help developers achieve shorter development times, higher processor performance, and to gain competitive differentiation through the RISC-V’s custom instructions and modular instruction set architecture, says Green Hills.

The Green Hills software development tools support both 32-bit and 64-bit RISC-V architectures and provide for the integer, multiply/divide, atomic, compressed, and single- and double-precision floating point modules. Users can add their own custom RISC-V instructions for use in the Green Hills’ compiler, assembler, Multi debugger, and instruction set simulator. RISC-V’s separate privileged instruction set specification is also supported.

Green Hills compilers support ISO/IEC 14882:2011 (C++11), ISO/IEC 14882:2014 (C++14) and ISO/IEC 14882:2017 (C++17) which offers a number of new language features and standard libraries. They also support Embedded C++ and GNU C/C++ extensions.

Certification support and evidence for MULTI and the C/C++ run-time libraries for RISC-V will be available in CY2021 to enable customers’ FuSa production program requirements.

To help prevent new software bugs in RISC-V applications, an integrated MISRA C/C++ Adherence Checker for MISRA 2004 and MISRA 2012 is seamlessly integrated in the Multi development tools and the DoubleCheck static source analyser identifies programming errors. DoubleCheck automatically runs during compilation, differentiating it from traditional static analysis tools which run separately from the compiler. The Run Time Error Checking tool complements DoubleCheck by finding bugs at run-time that cannot be identified by static analysis alone.

The Multi development tools can quickly identify and solve problems during software development on RISC-V and other 32- and 64-bit processor architectures. They include the Multi debugger and JTAG probe for single-window debugging and control on complex heterogenous SoCs comprised of one or more RISC-V cores with other cores.

The Profiler pinpoints performance bottlenecks by clearly displaying processor times consumed by each task, function, source line, and assembly language instruction.

The Multi development tools, optimizing C/C++ compilers and Green Hills Probe for RISC-V are available today.

https://ghs.com/go/risc-v

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OX03C10 is smallest ASIL-C automotive image sensor says OmniVision

Believed to be the industry’s first image sensor for automotive viewing cameras with 140dB high dynamic range (HDR) and LED flicker migration performance, the OX03C10 ASIL-C sensor provides low light sensing in premium vehicles.

The OX03C10 combines a large 3.0 micron pixel size with an HDR of 140dB and what OmniVision Technologies claims is the best LED flicker mitigation (LFM) performance for viewing applications with minimised motion artefacts.

It is claimed to be the first view sensor with HDR and LFM that can deliver 1920 x 1280p resolution at the highest rate of 60 frames per second, enabling greater design flexibility and faster camera-view switching for drivers. It is also claimed to have the lowest power consumption of any LFM image sensor with 2.5Mpixel resolution, which is 25 per cent lower than the nearest competitor says OmniVision, and the industry’s smallest package size.

Integrated basic image processing capabilities include defect pixel correction and lens correction. Integration of the HDR and LFM engine (HALE) combination algorithm provides optimal HDR and LFM performance simultaneously. The OX03C10 can be integrated into space constrained rear view cameras, surround view systems, camera monitoring systems and e-mirrors.

“The OX03C10 uses our Deep Well, dual conversion gain technology to provide significantly lower motion artefacts than the few competing sensors that offer 140dB HDR,” said Kavitha Ramane, staff automotive product marketing manager at OmniVision. The split-pixel LFM technology with four captures operates across the entire automotive temperature range, across all lighting conditions and in the presence of flickering LEDs from headlights, road signs and traffic signals, says the company.

OmniVision’s PureCel Plus-S stacked architecture enables pixel performance advantages over non-stacked technology. For example, 3D stacking allowed OmniVision to boost pixel and dark current performance, resulting in a 20 per cent improvement in the signal-to-noise ratio over the earlier generation of its 2.5Mpixel  viewing sensors.

The OX03C10 also features four-lane MIPI CSI-2 and 12-bit DVP interfaces.

The image sensor is planned to be AEC-Q100 Grade 2 certified, and is available in both a-CSP and a-BGA packages.

http://www.ovt.com

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MiFare IC secures the future of contactless smart city services

Increased security for smart city installations is a feature of the MiFare DESFire EV3 IC, says NXP, claiming it ushers in a new era of security and connectivity for contactless smart city services.

It is the third evolution of NXP’s contactless MiFare DESFire portfolio. It is backwards compatible and offers enhanced performance with a greater operating distance and improved transaction speed. It is also claimed to deliver faster, more secure transactions that are truly contactless, such as paying for parking, accessing offices or campuses and using other essential city services; all touch-free.

The MiFare DESFire EV3 IC can be used by transit agencies, access control providers and system integrators.

The IC hardware and software are certified to Common Criteria EAL 5+, and the IC supports a broad choice of open crypto algorithms. A card-generated MAC helps to securely authenticate transactions, and a new Transaction Timer feature helps mitigate man-in-the-middle attacks making it harder for an attacker to interfere with a transaction. The new Secure Unique NFC (SUN) messaging feature is a secure method for maintaining data confidentiality and integrity. Each time a card, phone or ticket is tapped with the SUN feature enabled, an authentication message and crypto-secure URL are generated and sent to a server for verification, which makes taps unclonable, says NXP.

Support for MiFare DESFire EV3 will be integrated into NXP’s MiFare 2GO cloud service, which manages digitised MiFare product-based credentials and helps streamline mobile integration via NXP’s ecosystem. This will enable smart city services to be seamlessly deployed to NFC-enabled smartphones, wearables and other mobile devices, explains NXP.

For simplified deployment, each MiFare DESFire EV3 IC is pre-configured with keys to enable delegated application management, which supports seamless, over-the-air updates to already deployed smart cards using NFC-enabled smartphones.

NXP’s upcoming MiFare Plus EV2 IC will provide a drop-in replacement for upgrading existing MiFare Plus and MiFare Classic product-based installations to higher security.

http://www.nxp.com

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