Multi-cell battery ICs tackle large, HV battery packs

Battery packs that packs that power e-scooters, energy storage, high-voltage power tools, and other high-voltage equipment can be managed with RAA48920x ICs. Renesas Electronics claims that the multi-cell battery front end ICs for battery management systems (BMS) accelerate battery development for mobility, uninterrupted power supplies (UPS) and energy storage systems. 

The ICs provide fast, flexible, cell balancing up to 200mA to enable fast recharging and high utilisation in large battery packs with hot plug tolerance up to 62V. 

BMS, or the ‘brains’ of the battery pack, is increasingly adopted in UPS and data centres, driving demand for ICs that can support higher voltage and larger cell battery pack sizes, said Andrew Cowell, vice president at Renesas’, mobility, infrastructure and IoT power business division. The RAA489206 and RAA489204 ICs have been designed to simplify the design process and create robust, cost-effective battery systems for the growing mobility, UPS back up and energy storage markets, he explained.

The RAA489206 is designed for higher voltage mobility applications where larger cell count and temperature variance across cells are more likely to lead to cell-to-cell imbalances. It provides full high-side battery protection and monitoring for 4S to 16S cell battery packs. The RAA489204 provides improved daisy chain operation with accelerated device-to-device communication and enhanced diagnostics compared with previous-generation devices. It also has internal cell balancing options and support for the higher voltages and cell count required by UPS systems, grid back up and other energy storage systems.  

The ICs’ high integration simplifies the design cycle and reduces customers’ system bill of materials’ costs “significantly”, claims Renesas, adding that it also accelerates design and bill of material selection time from months to weeks. 

The ICs also feature extensive built-in self diagnostics, improving safety functionality, reducing firmware workload and easing the design burden for meeting safety standards. They are pin-to-pin compatible with Renesas’ previous battery front end devices.

Both the RAA489206 and RAA489204 ICs are available now. 

http://www.renesas.com

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Lattice extends sensAI software stack to add AI / ML to edge applications

Features for power-efficient AI / ML (artificial intelligence / machine learning) inferencing are incorporated into the Lattice sensAI stack have been announced by Lattice Semiconductor.

The latest version (v4.1) of the sensAI solution stack is available now and supports Lattice’s roadmap of AI-based applications. Enhancements and new features include user presence detection to automatically power on/off client devices as a user approaches or departs, attention tracking to lower a device’s screen brightness to conserve battery life when the user isn’t looking at the screen, face framing to improve the video experience in video conferencing applications and onlooker detection to realise when someone is standing behind a device; it blurs the screen to maintain data privacy.

There is also expanded application support, with improved performance and accuracy for object and defect detection applications in automated industrial systems. There is also a new hardware platform for voice and vision-based ML application development featuring an onboard image sensor, two I2S microphones, and expansion connectors for adding additional sensors.

An updated neural network compiler supports Lattice sensAI Studio, a GUI-based tool with a library of AI models that can be configured and trained for popular use cases. sensAI Studio now supports AutoML features to enable creation of ML modules based on application and dataset targets. Several of the models based on the Mobilenet ML inferencing training platform are optimised for the latest Nexus FPGA family, Lattice CertusPro-NX. The stack is compatible with other ML platforms, including the latest versions of Caffe, Keras, TensorFlow, and TensorFlow Lite.

To meet the demand for more responsive and context-aware user experiences, high quality video conferencing, and collaboration applications on client compute devices, Lattice Nexus FPGAs and the sensAI stack can be used to develop computer vision and sensor fusion applications that improve engagement, privacy, and collaboration for users. For example, a client device can leverage image data from its camera to determine if someone is standing too close behind the user and blur the screen for privacy or lengthen battery life by dimming the device’s display when it ‘sees’ the user’s attention is focused elsewhere.

“AI applications based on vision, sound, and other sensors will revolutionise the client computing experience,” believes Matt Dobrodziej, vice president of segment marketing and business development at Lattice. The sensAI solution stack supports a roadmap of edge AI applications that make client devices contextually aware of how, when and where they’re being used, he explains. The Nexus FPGAs deliver that functionality with low power consumption, he adds.

Compute devices using an AI application developed with the sensAI solution stack and running on a Lattice FPGA have a 28 per cent longer battery life in comparison to devices powering AI applications with their CPUs, Lattice reports. The sensAI solution stack also supports in field software updates to keep pace with AI algorithms and provides OEMs the flexibility to choose from different sensor and SoC technologies.

Lattice is working with AI ecosystem partner, such as Mirametrix, to develop the Lattice client compute AI experience roadmap. Its Glance attention-sensing software captures a user’s face, eyes, and gaze to understand user awareness and attention. The technology is used to create smart devices capable of more natural and immersive user experiences and device interaction, said Stephen Morganstein, Mirametrix’s vice president. “Lattice’s sensAI solution stack and low power FPGAs help developers implement novel AI capabilities that can improve a device’s battery life,” he said.

http://www.latticesemi.com

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i.MX 93 applications processor enhances security at the edge, says NXP

Believed to be the industry’s first implementation of the Arm Ethos-U65 microNPU, the i.MX 93 applications processors are the first in NXP’s i.MX 9 series.

The applications processors are designed for automotive, smart home, smart building and smart factory applications, which use edge machine learning to anticipate user needs. They combine the Arm Ethos-U65 microNPU with a high level of security and integration to deliver efficient, fast, secure machine learning at the edge, for example in voice-assisted smart home and building systems. They can also be used in low power industrial gateways and automotive driver monitoring systems. 

The i.MX 93 family has a heterogenous multi-core architecture, including up to two 1.7GHz Arm Cortex-A55 applications processors and a real-time Cortex-M33 microcontroller subsystem with access to all SoC peripherals, including the 256 MACs / cycles Arm Ethos-U65 microNPU. This architecture delivers power-efficient machine learning across a variety of applications, including compact, battery-powered IoT devices, says NXP. 

The i.MX 93 family supports a variety of industrial and automotive connectivity interface protocols, in addition to broad multi-media interfaces. This also reduces the need for external hardware components and additional design work, to reduce the time to market as well as overall systems costs. 

Ron Martino, executive vice president and general manager, ege processing for NXP Semiconductors, believes: “The highly integrated i.MX 93 applications processors will help open an entirely new range of use cases at the edge, where you need to have that close tie-in to the sensor data to make fast decisions. This will enable a new generation of secured, efficient, intelligent devices across IoT, industrial IoT and automotive applications.”

NXP’s EdgeLock secure enclave is a standard on-die feature across the i.MX 9 series. It is a pre-configured, self-managed and autonomous security subsystem. It is particularly useful for developers without deep security expertise.

“We’re making it easier for developers to create, connect, and maintain innovative IoT devices by providing a comprehensive platform actively supported by the scale and expertise of Microsoft software, cloud and security experts,” said Halina McMaster, partner group program manager, Microsoft Azure Sphere. “Together with NXP, we are delivering a variety of Microsoft Azure Sphere-certified edge processors that provide a secured environment for customer applications, critical over-the-air update infrastructure, and more than 10 years of ongoing security improvements for every Azure Sphere chip,” she said. 

i.MX 93-CS processors with Azure Sphere are built with Microsoft Pluton enabled on the EdgeLock secure enclave. Pluton on EdgeLock secure enclave is the dependable hardware root of trust which is built into the silicon and enables the Azure Sphere security stack.

Machine learning application development on the i.MX 93 family will be enabled by the eIQ software development environment, including the eIQ Toolkit workflow tools, the GUI-based eIQ Portal development environment and eIQ inference engine options that will include the Arm Ethos-U65 microNPU as an inference target. 

The i.MX 93 applications processors implement NXP’s innovative Energy Flex architecture, enabling developers to optimize energy usage for each operating mode to create portable devices with longer battery life. 

http://www.nxp.com

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Bluefield-3 DPU accelerates virtual clouds, says Nvidia

With 400Gb/s Ethernet or NDR 400Gbits per second InfiniBand network connectivity, BlueField-3 DPU (data processing unit) offloads, accelerates, and isolates software-defined networking, storage, security, and management functions to improve data centre performance, efficiency and security, says Nvidia. 

The third-generation Bluefield infrastructure on a chip enables organisations to build software-defined, hardware-accelerated IT infrastructures from cloud to core data centre to edge, says the company. In addition to powerful computing and a range of programmable acceleration engines in the I/O path, BlueField-3 is addresses the infrastructure needs of the most demanding applications and software backwards compatibility through the Nvidia DOCA software framework. 

BlueField-3 DPUs transform traditional computing environments into secure and accelerated virtual private clouds, allowing organisations to run application workloads in secure, multi-tenant environments. It decouples data centre infrastructure from business applications and is claimed to deliver optimal bare-metal performance and native support for multi-node tenant isolation. 

BlueField-3 DPU features video streaming Storage NVMe over Fabrics (NVMe-oF), NVMe/ TCP, hyper converged infrastructure (HCI), encryption, data integrity, data de-duplication, decompression, erasure coding/RAID Security Distributed firewall, IDS/ IPS, root of trust and microsegmentation.

The portfolio includes one, two or four ports with up to 400Gbits per second connectivity, 16Gbyte on-board DDR5 memory. There is also a 1GbE out-of-band management port,  single port InfiniBand or dual ports of NDR200 / HDR (200Gbits per second), 32 lanes of PCIe Gen 5.0 and non-transparent bridging.

The ample memory consists of up to 16 Armv8.2+ A78 Hercules cores (64-bit), 8Mbyte L2 cache and 16Mbyte LLC system cache. There is also a programmable datapath accelerator, DDR DIMM support, including dual DDR5 5600Mtransfers per second DRAM controllers and ECC protection. 

For security, there is secure boot with public key accelerator (PKA) root-of-trust, secure firmware update and Flash encryption, MACsec / IPsec / TLS data-in-motion encryption, an AES-GCM 128 / 256-bit key, AES-XTS 256 / 512-bit data-at-rest encryption, connection tracking for stateful firewall and true random number generator (TRNG) storage.

 https://www.nvidia.com/

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