CPO 2.0 arrives for AI / ML with high density optical interconnect

At this week’s OFC 2022, Ranovus demonstrates what it claims is the industry’s first adaptive compute acceleration co-packaged optics platform for artificial intelligence / machine learning (AI / ML).

The Ranovus Odin Analog-Drive CPO 2.0 eliminates the need for the retimer which results in a 75 per cent smaller footprint and 40 per cent cost and power consumption savings in the optical interconnect, claims the company.

Ranovus demonstrated the co-packaged optics using a Xilinx Versal ACAP (Adaptive Compute Acceleration Platform) and Ranovus Odin 800Gbits per second CPO 2.0.  The joint demonstration highlighted the arrival of the CPO 2.0 or AI/ML platforms that demand power efficient, high throughput and  high density optical interconnect. 

Ranovus’ Odin is a low latency, high density, and protocol-agnostic optical engine that delivers “massive optical interconnect bandwidth”, scaling 800Gbits per second to 3.2Tbits per second in the same footprint by  leveraging Ranovus’ 100Gbits per second per lambda monolithic electro-photonic IC (EPIC) IP, laser platform and advanced packaging technologies.  

The Odin Analog-Drive CPO.20 for Ethernet switch and module applications was announced and the company offers multi-disciplinary IP cores to accelerate the adoption of Analog-Drive CPO in data centres.

CPO provides Nx100Gbits per second PAM4 optical I/O channels for Ethernet switch and ML / AI silicon in a single packaged assembly. This “significantly reduces” the cost and power consumption of the complete system, explained Ranovus.

“We’re proud of our collaboration with Ranovus that helped achieve record performance levels while at the same time reducing power and overall footprint of the complete solution,” said Dan Mansur, vice president, Adaptable and Embedded Computing Group, AMD (formerly Xilinx). By integrating the optics into the package using Versal Premium ACAPs, AMD and Ranovus are able to reduce power, simplify board routing, and reduce cost.

“This CPO demonstration highlights the versatility of the Versal GTM SerDes to operate over anything from long-reach copper to directly driving the Ranovus Analog-Drive CPO 2.0 optical engine. Co-packaging Ranovus Odin with Xilinx Versal is a significant advancement which enables data centre customers to build highly efficient and cost-effective systems for next-generation workloads,” added Mansur/

Visit the AMD booth (5711) or the Ranovus booth (5917) at OFC 2022 in San Diego (6 – 10 March).

http://www.ranovus.com

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Ceva adds Wi-Fi 6/6E access point IP to RivieraWaves family

To address the expansion of Wi-Fi 6 into smart homes as well as industrial, automotive and IoT markets, Ceva claims to offer the industry’s first Wi-Fi 6/6E access point IP. It has been added to the company’s RivieraWaves Wi-Fi IP family. 

It is designed for high bit rate, low latency connectivity in these emerging consumer and enterprise applications, with all the latest features of the IEEE 802.11ax standard.

Wi-Fi 6 is on track to displace Wi-Fi 5 (i.e., IEEE 802.11ac) as the dominant form of consumer Wi-Fi by 2023, said Ceva. 

Innovations in Wi-Fi 6 make it suitable for the home and office environment, which has high bandwidth clients such as phones, laptops, tablets, gaming stations, smart TVs and set-top boxes, and IoT devices. For industrial applications, manufacturing and factory automation require cost-effective, low-latency, high-performance indoor connectivity in what can be challenging environments. Wi-Fi 6 offers features such as multi-user OFDMA (orthogonal frequency division multiple access) downlink and uplink as well as multi-user MIMO (multiple input, multiple output), for efficiency and low latency in heterogeneous high concurrency environments. The 6GHz spectrum resource opened by Wi-Fi 6E enables high throughput with 160HMz bandwidth connections even in congested environments.

The RivieraWaves Wi-Fi 6 Access Point IP delivers digital PHY and MAC layers for IEEE 802.11ax in a 2×2 configuration, supporting up to 160MHz bandwidth and a throughput of up to 2401Mbits per second (at MCS11-2SS-160MHz). It supports AES-CCM /GCMP, RC4 and WPI crypto accelerators and offers features to enhance medium usage like the preamble puncturing, target wake time, fragmentation and 1024 QAM, added Ceva. An advanced PTA (packet traffic arbitration) function “ensures smooth co-existence with Bluetooth”. The radio interface enables integration with radio circuitry from Ceva partners or licensee’s own radio, including with radios that support 6GHz for Wi-Fi 6E. To simplify deployment in SoC/ASSP designs, the RivieraWaves Wi-Fi 6 Access Point IP is provided with an integration-ready platform containing an optional open-source RISC-V processor and is operating system-agnostic.

The RivieraWaves Wi-Fi 6 Access Point IP is available for licensing now. 

http://www.ceva-dsp.com

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Servers based on Iceland-D processors are optimised for intelligent edge use

Servers based on Intel’s Xeon D processors have been launched by Supermicro Computer at MWC in Barcelona.

The E300,110D and 510D servers incorporate the latest Intel Xeon D-1700 and Intel Xeon D-2700 processors. They are designed for ruggedised environments where the power and performance of the Intel Xeon D processors are needed to meet demanding service level agreements (SLAs) says Supermicro.

The SYS-E300 incorporates an Intel Xeon D processor with four, eight or 10 cores and up to 256Gbyte of DDR4 memory in a 1U mini-server case. The SYS-510D model offers larger amounts of storage and a total of four 1G and two 25G Ethernet ports, while the SYS-110D servers contain CPUs with up to 20 cores and 512Gbyte of memory. Each system includes the Intel Xeon D processor with an SoC for the edge with built-in AI, security, advanced I/O, and dense computing. 

Organisations that deliver services to the edge will be able to process increasing amounts of data acquired at the edge using these servers, says Supermicro. The Supermicro SYS-110D server includes a single Intel Xeon D processor, with a TDP up to 125W and a PCI-E 4.0×16 slot. Various I/O options are available, and up to two 2.5-inch SATA/U.2 drives can be installed. Redundant power supplies are available, whether AC or DC power is needed.

“The new Intel Xeon-D processors are specifically designed for processing at the edge of the network, with dense compute and high-performance network connectivity that delivers high data throughput from the edge that businesses demand,” explained Jeni Panhorst, Intel vice president and general manager, Network & Edge Platforms division.  

The SYS-E300 product line contains up to two SATA drives. Popular application areas are networking applications such as firewalls and universal customer premises equipment, which consolidates processing and networking needs in an easy-to-use compact form factor.

 Visit Supermicro at MWC (Hall 5, Booth 5D66)

http://www.supermicro.com

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Renesas expands RZ family with RISC-V core addition

Renesas has announced that its RZ/Five family now includes general purpose microprocessor units (MPUs) built around a 64-bit RISC-V CPU core. The company selected the Andes AX45MP, based on the RISC-V CPU instruction set architecture (ISA). 

According to Hiroto Nitta, senior vice president and head of SoC business in the IoT and Infrastructure business unit at Renesas, the introduction of the RZ/Five MPUs and accompanying ecosystem support, shows Renesas “taking the lead in providing RISC-V solutions ahead of the market”.

The RZ/Five is the first general-purpose MPU available to be built around a 64-bit RISC-V core from Andes,” confirmed Frankwell Lin, chairman and CEO at Andes Technology. “Andes has collaborated with Renesas first on the 32-bit RISC-V core and now on the 64-bit AX45MP, and I anticipate that this development will lead to the early adoption of customers’ devices in the global market built with Andes’ advanced RISC-V processor families,” he said.

There is increased demand for IoT endpoint devices, such as gateways for solar inverters or home security systems, to collect sensor data and connect to servers or to the cloud. In response, RZ/Five is optimised to provide the performance and peripheral functions required of IoT endpoint devices. Its maximum operating frequency is 1.0GHz. Peripheral functions include support for multiple interfaces, such as two Gigabit Ethernet channels, two USB 2.0 channels and two CAN channels, as well as dual ADC modules. Support is also provided for connecting external DDR memory with error checking and correction (ECC) and security functions.

The peripheral functions and package of RZ/Five are compatible with those of the Arm core–based RZ/G2UL. The RZ/Five also comes in a smaller, compact package. An RZ SMARC evaluation board kit will be offered with a module board conforming to the SMARC 2.1 standard, equivalent to the currently available environment for the RZ/G Series. This kit allows switching and evaluating between an RZ/Five CPU module and an RZ/G2UL CPU module, enabling easy evaluation and shortening product development cycles.

Renesas offers Linux support via a Verified Linux Package (VLP) with industrial-grade Civil Infrastructure Platform (CIP) Linux. This offers long term maintenance support for more than 10 years and is designed to make the RZ/Five series appealing for corporate infrastructure and industrial applications that require a high level of reliability and extended service life. It also allows users to dramatically reduce future Linux maintenance costs, said Renesas.

Samples of the RZ/Five MPUs are available starting today, and mass production is scheduled to begin in July 2022. 

https://www.renesas.com

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