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Servers and processors are optimised for cloud native infrastructure

Thu, Jun 15, 2023

Tracking the evolving portfolio of AMD EPYC 9004 series processors, Supermicro announces system optimised with up to 128 Zen 4c cores and AMD 3D V-Cache technology.

The cloud, AI / ML, storage and 5G / edge providers has unveiled servers powered by 4th Gen AMD EPYC processors for cloud native computing, with leading thread density and 128 cores per socket. In addition to rack density and scalable performance they are energy efficient to deploy cloud native workloads in more consolidated infrastructure, said Supermico. The systems are targeted for cloud operators to meet the ever-growing demands of user sessions and deliver AI-enabled new services. Servers featuring AMD 3D V-Cache technology excel in running technical applications in FEA, CFD, and EDA, said AMD. The large Level 3 cache enables these types of applications to run faster than earlier processors.

“We design and deliver resource-saving, application-optimised servers with rack scale integration for rapid deployments,” said Charles Liang, president and CEO of Supermicro. “With our growing broad portfolio of systems fully optimised for the latest 4th Gen AMD EPYC processors, cloud operators can now achieve extreme density and efficiency for numerous users and cloud-native services even in space-constrained data centres. In addition, our enhanced high performance, multi-socket, multi-node systems address a wide range of technical computing workloads and dramatically reduce time-to-market for manufacturing companies to design, develop, and validate new products leveraging the accelerated performance of memory intensive applications.”

“4th Gen AMD EPYC processors offer the highest core density of any x86 processor in the world,” confirmed Lynn Comp, corporate vice president, server product and technology marketing, AMD.

The H13 Hyper-U servers are designed for the high-performance and density ideal for cloud-native workloads such as virtualisation and HCI, with a single 4th Gen AMD EPYC processor for cloud native computing of up to 128 cores. In addition, storage-optimised configurations are available that contain either 12x 3.5 inch drive bays or 24x 2.5 inch drive bays. Using a single CPU with the Hyper-U may reduce software licensing costs and cooling challenges compared to dual CPU servers while still providing maximum core density and doubling the memory capacity with support for up to 12 channels of DDR5 in 24 DIMM slots, advised Supermicro.

The company also announced H13 All-Flash EDSFF, the All-Flash NVMe storage systems powered by AMD EPYC 9004 Series processors, based on Zen 4c architecture. They are designed with the latest EDSFF technologies for capacity in a compact 1U chassis. Taking advantage of 128 PCIe 5.0 lanes, it supports 16 (7.5mm) EDSFF E3.S drives, or eight E3.S (x4) drives and four CXL devices in E3.S 2T form factor allowing memory expansion for use cases such as in-memory database applications.

There were also enhancements to the H13 GPU-optimised systems, the 1U and 2U dual-socket H13 Hyper series of rackmount servers, the single-socket H13 CloudDC and the H13 GrandTwin the 2U four-node system which is purpose-built for single-processor performance.

https://www.supermicro.com/

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HBT power amplifiers deliver 0.5W of linear output power for 5G without DPD

Thu, Jun 15, 2023

The GRF55xx series of InGaP HBT power amplifiers from Guerrilla RF are the first of a new class of 0.5W linear power amplifiers which target all primary cellular bands spanning 615 to 4200MHz. Guerrilla RF also offers GRF56xx variants which double the series’ output power capabilities.

The linear power amplifiers are intended for 5G wireless infrastructure applications that require exceptional native linearity over temperature extremes of -40 to +85 degrees C. Each can deliver up to 26dBm of output power with better than -45dBc of ACLR performance and EVM (error vector magnitude) levels less than 1.2 per cent, without the aid of supplemental linearisation schemes such as digital pre-distortion (DPD).

The ability to beat the -45dBc ACLR (adjacent channel leakage ratio) performance metric without DPD is critical for size, cost and power-sensitive cellular applications, for example in home and commercial repeaters / boosters, femtocells, picocells and cable loss compensators found in automobiles, explained Guerrilla RF.

The first devices to be formally released are the GRF5607 and GRF5608. The span frequency ranges of 703 to 748MHz and 746 to 830MHz, respectively. They are tuned to operate within the n12, n14, n18, n20 and n28 5G new radio (NR) bands.

The ability to beat the -45dBc ACLR performance metric without DPD is critical for cellular applications like home and commercial repeaters/boosters, femtocells, and picocells, as well as cable loss compensators which are used in conjunction with automotive ‘shark fin’ antennas. In each of these use cases, the sensitivity to cost, power and size constraints prohibits the use of elaborate linearization techniques like DPD. Instead, designers must rely on the power amplifier’s native linearity to meet the stringent emissions mask requirements imposed by the latest 5G standards.

“By essentially doubling the output power, GRF is enabling customers to increase the range of their systems by up to 40 per cent,” said Jim Ahne, Guerrilla RF’s vice president of Automotive and 5G products. “Given that these new devices are pin-pin compatible with the previously released GRF55xx series, customers now have an easy path to upgrading the range capabilities of their existing repeater/booster and compensator platforms,” he added.

The GRF5607 and GRF5608 are supplied in pin-compatible 3.0 x 3.0mm, 16-pin QFN packages.

Samples and evaluation boards are available now for both the GRF5607 and GRF5608.

https://www.guerrilla-rf.com

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AMD uses Zen 4c core architecture for EPYC 97X4 data centre CPUs

Thu, Jun 15, 2023

Two workload optimised processors are based on AMD’s new Zen 4c core architecture. The AMD EPYC 97X4 cloud native-optimized data centre CPUs extend the EPYC 9004 series of processors to deliver the thread density and scale needed for leadership cloud native computing.

The company has also announced the 4th Gen AMD EPYC processors with AMD 3D V-Cache technology, which are suitable for the most demanding technical computing workloads, said AMD. “Forrest Norrod, executive vice president and general manager, Data Center Solutions business group, AMD, commented: “We closely align our product roadmap to our customers’ unique environments and each offering in the 4th Gen AMD EPYC family of processors is tailored to deliver compelling and leadership performance in general purpose, cloud native or technical computing workloads.”

The AMD EPYC 97X4 processors, with up to 128 cores, deliver up to 3.7 times throughput performance for key cloud native workloads compared to Ampere . The 4th Gen AMD EPYC processors provide customers up to 2.7 times better energy efficiency and support up to three times more containers per server to drive cloud native applications at the greatest scale.

At the Data Center and AI Technology Premiere, Meta confirmed that these processors are well suited for mainstay applications such as Instagram and WhatsApp, with “impressive performance gains” compared to 3rd Gen AMD EPYC across various workloads, while offering substantial TCO improvements.

Technical computing enables faster design iterations and more robust simulations to help businesses design new and compelling products. The 4th Gen AMD EPYC processors with AMD 3D V-Cache technology extend the AMD EPYC 9004 series of processors to deliver the world’s best x86 CPU for technical computing workloads such as computational fluid dynamics (CFD), finite element analysis (FEA), electronic design automation (EDA) and structural analysis.

Optimised for the most demanding HPC applications, the processors deliver performance gains of up to five times when compared to the previous generation HBv3 and scale to hundreds of thousands of CPU cores.

The 4th Gen AMD EPYC processors are available today and are feature and socket compatible with existing AMD EPYC 9004 series CPU-based systems, for a seamless upgrade path.

http://www.amd.com

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Riviera-PRO supports system simulation of AMD Versal ACAP designs

Thu, Jun 15, 2023

Simulation and verification specialist, Aldec has announced that its latest release of Riviera-PRO supports system simulation of Versal Adaptive Compute Acceleration Platform (ACAP) designs.

Versal ACAP, developed by Xilinx/AMD, is an adaptable platform comprising an AI engine, processing system, programmable logic, network on chip (NoC) and hardened domain-specific IPs such as PCIe Gen5 with DMA and CCIX, HBM, 600G Interlaken and 600G Ethernet. It enables heterogeneous computing of complex algorithms and accelerates workloads, such as AI embedded computing and high-performance computing.

Riviera-PRO supports system simulation of Versal ACAP designs based on the Vitis hardware emulation flow for testing the interactions between AI engine, the processing system and the programmable logic. The entire hardware emulation setup and system integration is done within the Vitis environment. Vitis runs the AI engineE simulator for the graph application, the Riviera-PRO simulator for the programmable logic kernels, and QEMU (open-source system emulator) for the processing system host application. SystemC models are also available for the AI engine and NoC, and they can also be simulated in Riviera-PRO.

System simulation is critical for any Versal ACAP design because of its complex adaptable architecture and high logic density. The full system design can be tested with full debug visibility much earlier in the project cycle without any physical hardware, explained Aldec. This makes it easier to run more test scenarios, test corner cases, and debug complex problems.

Riviera-PRO also has a mixed-HDL simulation engine, advanced debugging environment using waveform viewer, advanced dataflow, RTL hierarchy, objects viewer, and verification coverage features such as code coverage and functional coverage. There is also comprehensive support for SystemVerilog and UVM for users who need to develop reusable and complex testbench environments.

“The Versal ACAP architecture is revolutionary in the FPGA domain, and a game-changer for heterogeneous computing”, said Louie De Luna, Aldec’s director of marketing. “With Versal, users can customise their own domain-specific architectures for optimised computations of their specific workloads. We are now stepping into the computing era where the differentiation is done in hardware instead of software.”

System simulation can be used to perform algorithmic validation, verify architectural extrapolation, connected hardware platforms and application software.

There are Versal ACAP tutorial designs and steps on how to use Riviera-PRO as the RTL simulator for the Vitis hardware emulation flow on Aldec’s Github.

Riviera-PRO 2023.04 is now available for download and evaluation.

http://www.aldec.com

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Servers and processors are optimised for cloud native infrastructure

HBT power amplifiers deliver 0.5W of linear output power for 5G without DPD

AMD uses Zen 4c core architecture for EPYC 97X4 data centre CPUs

Riviera-PRO supports system simulation of AMD Versal ACAP designs

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