ML inference software library makes CNNs power-efficient

Machine learning (ML) inference software from Synopsys is optimised for low power IoT applications that use convolutional neural networks (CNNs) and recurrent neural networks (RNNs).

The embARC Machine Learning Inference (MLI) software library supports the energy-efficient Synopsys DesignWare ARC EM DSP and HS DSP processors. It is claimed to boost performance up to 16X for 2D convolution layers compared to unoptimised implementations and accelerates RNNs up to a factor of five for a range of topologies, including those built with long short-term memory (LSTM) cells.

The embARC Machine Learning Inference software library is designed to help developers create power-efficient neural network system on chip (SoC) designs incorporating Synopsys’ DesignWare ARC EM and HS DSP processor IP. The software library provides developers with optimised functions to implement neural network layer types, significantly reducing processor cycle counts for applications that require low power and area, such as voice detection, speech recognition, and sensor data processing, says Synopsys.

The embARC MLI software library is available through embARC.org, a dedicated website that provides software developers access to free and open source software, drivers, operating systems, and middleware supporting ARC processors.

The embARC MLI software library supports ARC EMxD and HS4xD processors and provides a set of kernels for effective inference of small- or mid-sized machine learning models. It enables the efficient implementation of operations such as convolutions, long short-term memory (LSTM) cells, pooling, activation functions such as rectified linear units (ReLU), and data routing operations, including padding, transposing, and concatenation, while reducing power and memory footprint.

Synopsys cites the example of low-power neural network benchmarks such as CIFAR-10 running on an ARC EM9D processor which can achieve up to a four fold reduction in cycle count compared to competitive processors in the same class, claims Synopsys. The MLI library provides an average of three to five times performance improvement across a wide range of neural network layers, such as depth-wise 2D convolution, fully connected, basic RNN cells, and LSTM cells with a maximum performance boost of up to 16X for 2D convolution layers.

Picture credit: iStock

https://www.synopsys.com

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Quick Starter kit evaluates NXP i.MX 8 QuadMax processors

Industrial computing module manufacturer, congatec, has released its latest evaluation kit for NXP i.MX 8 processor. The SMARC 2.0 Quick Starter Kit for NXP i.MX 8 designs offers everything developers need for the immediate evaluation of the new NXP i.MX 8 processor generation. In particular, vision-based AI application developers can benefit from the natively supported integrated Mobile Industry Processor Interface (MIPI) and optional pre-configured software support for artificial intelligence (AI).

The SMARC 2.0 Quick Starter Kit for NXP i.MX 8 can be used by developers of integrated industry IoT (IIoT), industrial and embedded vision applications because they can immediately integrate a credit card sized off-the-shelf module into their applications with minimum space requirements, says congatec. The starter kit complements the comprehensive i.MX 8 ecosystem of products and services. “It enables the rapid evaluation of the i.MX 8 processor architecture, which will open up many new application fields for us in the real-time industrial area as well as in vision-based AI sectors,” explains Martin Danzer, director product management at congatec. “Thanks to the comprehensive design-in services of our Technical Solution Center that come with the starter kit, it really couldn’t be any easier to start developing SMARC 2.0 based i.MX 8 applications,” he adds.

Services offered by the Technical Solution Center for the new SMARC 2.0 and Qseven modules with NXP i.MX 8X processors include high assurance booting (HAB) implementation, bootloader and operating system (OS) image authentication through private and public key cryptography and customer-specific board support package (BSP) adaptation to long-term software maintenance for Linux and Android. The offering further includes a selection of suitable carrier board components and design reviews as well as high-speed signal compliance tests, thermal simulations, meantime between failure (MTBF) calculations, and debugging services for customer-specific solutions.

The congatec SMARC 2.0 Quick Starter Kit integrates conga-SMX8 computer modules with either the low-power NXP i.MX 8X or the high-end NXP i.MX 8 (QuadMax) series, as well as a conga-SEVAL evaluation carrier board, which offers access to all interfaces and functions for SMARC 2.0 based NXP i.MX 8 designs. The evaluation carrier supports a set of interfaces including four PCIe x1, one mini PCIe, two USB 3.0, and four USB 2.0 for generic extensions. Next to two RJ45 for Gigabit Ethernet, four COM, one CAN bus and 12 general purpose input/outpus (GPIOs) are also available.

Displays can be connected via dual channel LVDS, eDP, DP and two MIPI-DSI, and additional storage media via an SD/MMC socket and one SATA 6G. Digital and analogue audio I/Os for I2S and HDA interfaces are also available.

The Quick Starter Kit also includes an ATX power supply, the conga-ACA2 MIPI CSI-2 dual camera module, WLAN antenna, LVDS adapter, SATA, USB cable and a cooling solution for the module. For software, there is a qualified bootloader package and board support packages for Linux, Yocto and Android available through the congatec Git server.

http://www.congatec.com

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Dual-output digital PoL regulator saves space in ICT applications

Designed for high current ICT applications, the BMR469 family of digital point of load (PoL) regulators has been introduced by Flex Power Modules. The BMR469 delivers high power density, up to 160A per square inch, to save valuable board space in space constrained designs.

There are two variants with different output currents. The 80A BMR4690000 measures 25.4 x 12.7 x 11.6mm (1.00 x 0.50 x 0.46-inch) and the 50A BMR4696001 has a low profile with a maximum height of 5.8mm (0.23-inch). This model can be used where designers need to find space for a large processor heatsink, or who want to place the PoL regulator on the underside of the PCB. The low height of the BMR4696001 also makes it possible to place it very close to the processor, thus improving transient response, says Flex Power Modules.

Both versions are configurable as either dual outputs or a single, higher-power output. Designers can use one part to cover different requirements, for example to drive different processors or FPGA rails, which helps simplify power system design, adds Flex.

The BMR4690000 variant provides two independent 40A outputs for dual configurations, or one 80A rail in single-output operation mode. The BMR4696001 provides two 25A outputs or one 50A rail in single-output operation mode. Up to four modules can be paralleled for current sharing, delivering a total of up to 320A for the BMR4690000 and 200A for the BMR4696001.

The BMR469 can be configured via pin-strap or PMBus, according to the application. The regulator is also supported by a simulation model in Flex’s Power Designer software, for design and debug. Using Flex Power Designer’s advanced simulation functions, designers can optimise configuration parameters to achieve a stable control loop with fast load transient responses.

The BMR469 is suitable for a range of applications in the ICT market and designs that require high power density and a digital architecture, such as test equipment or simulator manufacturers. The BMR469 is capable of providing sufficient power to drive components such as processors, FPGAs and ASICs.

Efficiency is typically 92.6 per cent at half load (12Vin, 5Vout). The input voltage range is 7.5 to 14V, and output range is 0.6 to 5.0V. The BMR469 meets safety requirements according to IEC/EN/UL 62368-1, and offers a mean time between failures (MTBF) of 18.49 million hours.

The BMR4690000 is available now, and the BMR4696001 will be available in April 2019.

http://www.flex.com

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IoT Innovations Challenge – #KeysightIoTChallenge

One Idea Is All It Takes

Keysight Technologies is inviting undergraduate and graduate students worldwide to participate in its IoT Innovation Challenge. To enter, students must design a low-power sensor network strategy in one of two Innovation Tracks.

Students will compete via online written and video submissions to win an all-expenses-paid trip to the Grand Final at the World Maker Faire in New York, September 21-22, 2019. Six teams will advance to the final, where they will demonstrate their prototypes live before a panel of judges.

Prizes
The Grand Champion team will win $50,000 in cash and $50,000 of select Keysight test equipment for their school. Two first-place winners in each Innovation Track will win $25,000 in cash and $25,000 of select Keysight test equipment for their school.

Pick Your Innovation Track

Track 1: Smart Land
Design a sensor network strategy to cover one sq. km. of urban area to monitor and report on one or more of the following: air quality, water quality, data quality and sound quality, for at least one year.

Track 2: Smart Water
Design a sensor network strategy to cover a major waterway area to monitor and report, on one or more of the following: acidity, turbidity, and contaminants, for at least one year.

Calling All Students!
This is your chance to make the world better for billions. Are you ready to step up and innovate? Contest open to graduate and undergraduate students. Any student graduating before the Grand Final event is also eligible to participate.

Registration opens April 2019. Contest rules are forthcoming. Sign up now to be notified when registration goes live. #KeysightIoTChallenge

Signup here

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