Farnell supports designers of light-energy harvesting with Epishine signing

Swedish company, Epishine, which manufactures printed organic solar cells and development kits, has signed a franchise agreement with Farnell, an Avnet company. Farnell says it is the first high service distributor to stock products from the company.

The printed organic solar cells are optimised for harvesting energy from indoor, low energy lighting enabling organic solar power to be used everywhere. Design engineers can use this technology with Epishine’s light energy harvesting evaluation kit.

Epishine’s organic solar cells are small, thin, flexible, and printed on recyclable plastic. The cells can be integrated into any low power electronic equipment where they convert ambient indoor light into electricity. The organic solar cells can replace batteries in new-build wireless sensors and similar devices, reducing the environmental impact of battery waste and saving battery replacement costs, said Farnell.

The EK01LEH3_6 light energy harvesting evaluation kit demonstrates how Epishine’s light energy harvesting (LEH) modules can power indoor wireless low-power devices that are usually powered by batteries. It combines a six-cell 50 x 50mm LEH module with a supercapacitor which acts as an energy buffer and intelligent charging management system to support various output voltages and energy storage solutions. An external primary battery can be used as a back up. The evaluation kit can deliver sufficient output current to power most low-power wireless devices such as Bluetooth Low Energy, Zigbee and LoRa. The programmable evaluation kit are optimised for indoor use (-20 to +40 degrees C / 0 to  85 per cent RH) with illumination intensities of 20 to 1,000 lux

It also includes a supercapacitor for energy storage which can be reconfigured to charge rechargeable battery.

Epishine’s organic solar cells will be added to Farnell’s line card later this year.

Founded in 2016, Epishine is a Swedish technology company which manufactures flexible organic light modules and a development kit to help engineers design new products that are normally powered by batteries. The light modules can be used to partly or completely power wireless sensors and similar devices required in our increasingly connected world.

Epishine’s manufacturing process is claimed to provide industry-leading efficiency in low light conditions. The company was founded in 2016 and has 25 employees with its headquarters, lab and manufacturing located in Linköping, Sweden.

Farnell offers a range of products in its comprehensive semiconductor portfolio to support design engineers. Customers also have free access to online resources, datasheets, application notes, videos, webinars and 24/5 technical support.

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Intel addresses data centres with Sapphire Rapids processor

Another launch at this year’s Intel’s Architecture Day was the next generation Intel Xeon Scalable processor (code-named Sapphire Rapids). The processor delivers substantial compute performance across dynamic and increasingly demanding data centre uses and is workload-optimised to deliver high performance on elastic compute models like cloud, microservices and artificial intelligence (AI).

The processor is based on a tiled, modular SoC architecture that leverages Intel’s embedded multi-die interconnect bridge (EMIB) packaging technology making it scalable while maintaining the benefits of a monolithic CPU interface. Sapphire Rapids provides a single balanced unified memory access architecture, with every thread having full access to all resources on all tiles, including caches, memory and I/O. According to Intel, the processor offers consistent low latency and high cross-section bandwidth across the entire SoC.

Sapphire Rapids is built on Intel 7 process technology and features Intel’s new Performance-core microarchitecture (see softei news 23 August), which is designed for speed and pushes the limits of low latency and single-threaded application performance. Sapphire Rapids delivers the industry’s broadest range of data centre-relevant accelerators, including new instruction set architecture and integrated IP to increase performance across a broad range of customer workloads and usages.

The processor integrates acceleration engines including the Intel Accelerator Interfacing Architecture (AIA). This supports efficient dispatch, synchronisation and signalling to accelerators and devices. There is also the Intel Advanced Matrix Extensions (AMX) which is a workload acceleration engine which delivers massive acceleration to the tensor processing at the heart of deep learning algorithms. It can provide an increase in computing capabilities with 2K INT8 and 1K BFP16 operations per cycle, said Intel.

Tests using early Sapphire Rapids silicon and optimised internal matrix-multiply micro benchmarks run over seven times faster using Intel AMX instruction set extensions compared to a version of the same micro benchmark using Intel AVX-512 VNNI instructions. This is significant for performance gains across AI workloads for both training and inference.

The Intel Data Streaming Accelerator (DSA) is designed to offload the most common data movement tasks to alleviate overhead and improve processing these overhead tasks to deliver increased overall workload performance. It can move data among CPU, memory and caches, as well as all attached memory, storage and network devices

The processor is built to drive industry technology transitions with advanced memory and next generation I/O, including PCIe 5.0, CXL 1.1, DDR5 and HBM technologies. An Infrastructure Processing Unit (IPU) is a programmable networking device designed to enable cloud and communication service providers to reduce overhead and free up performance for CPUs. Intel’s IPU-based architecture separates infrastructure functions and tenant workload which allows tenants to take full control of the CPU. The cloud operator can offload infrastructure tasks to the IPU to maximise the CPU. IPUs can manage storage traffic, which reduces latency while efficiently using storage capacity via a diskless server architecture. IPU allows users to use resources with a secure, programmable and stable solution that enables them to balance processing and storage.

Mount Evans is Intel’s first ASIC IPU. It integrates learnings from multiple generations of FPGA SmartNICs. It offers high performance network and storage virtualisation offload while maintaining a high degree of control. It provides a programmable packet processing engine for firewalls and virtual routing. There is also a hardware accelerated NVMe storage interface scaled up from Intel Optane technology to emulate NVMe devices. Intel Quick Assist technology deploys advanced crypto and compression acceleration.

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Intel introduces two x86 core architectures at Intel Architecture Day 2021

Intel has introduced two x86 core architectures – the Efficient-core and Performance-core microarchitectures.

The Efficient-core microarchitecture, previously code-named Gracemont, is designed for throughput efficiency, enabling scalable multi-threaded performance for multi-tasking. It is, says Intel, the company’s most efficient x86 microarchitecture for multi-core workloads with a workload that can increase with the number of cores.

It also delivers a wide frequency range. The microarchitecture allows Efficient-core to run at low voltage to reduce overall power consumption, while creating the power headroom to operate at higher frequencies. As a result, the microarchitecture can ramp up performance for more demanding workloads.

Efficient-core include a variety of advances to optimise workloads while conserving processing power and to improve instruction per cycle (IPC) rates. For example, it has a 5,000 entry branch target cache for more accurate branch prediction and a 64kbyte instruction cache to keep useful instructions close without expending memory subsystem power.

It also includes Intel’s first on-demand instruction length decoder that generates pre-decode information and Intel’s clustered out-of-order decoder to decode up to six instructions per cycle while maintaining energy efficiency. Other features include a wide back end with five-wide allocation and eight-wide retire, 256 entry out-of-order window and 17 execution ports.

Technology advanced include Intel Control-flow Enforcement Technology and Intel Virtualization Technology Redirection Protection. There Efficient-core microarchitecture also has the AVX ISA and new extensions to support integer artificial intelligence (AI) operations.

Intel says that the Efficient-core achieves 40 per cent more performance at the same power, compared with the Skylake CPU core, in single-thread performance. Alternatively, it can deliver the same performance while consuming 40 per cent less power. For throughput performance, four Efficient-cores offer 80 per cent more performance while still consuming less power than two Skylake cores running four threads or the same throughput performance while consuming 80 per cent less power.

The second microarchitecture to be launched Intel Architecture Day is Performance-core (previously code-named Golden Cove). This microarchitecture is the highest performing CPU core built by Intel and is designed for speed with low latency and single-threaded application performance. It has been introduced to address the fact that workloads are growing in terms of code footprint, demand more execution capabilities and have growing data sets and data bandwidth requirements. Performance-core microarchitecture is intended to provide “a significant boost in general purpose performance and better support for large code footprint applications,” said the company.

The Performance-core features a wider, deeper and smarter architecture than earlier microarchitectures with six decoders, eight-wide micro-op cache, six allocation and 12 execution ports. It also has bigger physical register files and deeper re-order buffer with 512 entry.

Other advances are improved branch prediction accuracy, reduced effective L1 latency and full write predictive bandwidth optimisations in L2.

Other features which help it to lower latency and advance single-threaded application performance are a Geomean improvement of around 19 per cent across a range of workloads over current 11th Gen Intel Core processor architecture (Cypress Cove) at ISO frequency.

There is also more parallelism and an increase in execution parallelism. For deep learning inference and training, there are Intel Advance Matrix Extension to accelerate AI. There is also dedicated hardware and new instruction set architecture to perform matrix multiplication operations “significantly faster”. The reduced latency is accompanied by increased support for large data and large code footprint applications.

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FWS-2280 supports multiple wireless connections

Powered by the Intel Atom x6000E, Celeron and Pentium N and J series processors (formerly Elkhart Lake), the FWS-2280 is a desktop network appliance designed to power network applications including UTM, Firewall, SD-WAN and VPN.

Aaeon has combined the Intel Atom x6000E, Celeron and Pentium N and J series processors with up to 32Gbyte of RAM. This allows the system to handle intensive networking applications, according to the company. The Intel processor in particular helps bring a host of technologies designed for more secure encryption and faster, more accurate connections, such as Intel AES-NI.

The FWS-2280 is equipped with four copper Gigabit RJ-45 LAN ports and one fibre small form-factor pluggable (SFP) port, allowing fast, direct connections. It has six antenna ports and three Mini PCIe slots (co-lay with M.2), allowing up to three expansion modules to be installed at the same time. Multiple overlapping Wi-fi and Bluetooth networks can be deployed as well as support for cellular WWAN deployments using 4G and 5G communication.

There is also a redundant power supply to help keep networks connected even if one power source fails. A 2.5-inch SATA drive bay helps power local network storage needs.

“The FWS-2280 is designed to deliver a network solution which provides faster, safer, more accurate data transfer,” said Caridee Hung, product manager with Aaeon’s Network Systems division. “The support for multiple wireless connections, including 5G, makes it perfect for deployment in areas with unreliable physical internet connections; and the Intel Atom x6000E processors power modern network applications including unified threat management and SD-WAN.”

Aaeon offers a range of manufacturer services which can customise the layout of network system, from powering working from home with VPN and firewall technology, to providing a uCPE white box platform for secure SD-WAN networks.

Established in 1992, Aaeon is one of the leading designers and manufacturers of industrial IoT and AI edge solutions. Aaeon provides reliable, high-quality computing platforms including industrial motherboards and systems, rugged tablets, embedded AI Edge systems, uCPE network appliances, and LoRaWAN/WWAN solutions. Aaeon provides experience and knowledge to provide OEM/ODM services worldwide. The company also works closely with cities and governments to develop and deploy smart city ecosystems, offering individual platforms and end-to-end solutions. Aaeon works closely with premier chip designers to deliver stable, reliable platforms, and is recognised as an associate member of the Intel Internet of Things Solutions Alliance and Solutions Plus Partner in the Intel Network Builders Winner’s Circle for 2020.

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