SOAFEE brings cloud-native design to vehicles, says Arm and partners

To address the software-defined needs of cars today quickly and seamlessly, a standardised framework will enhance proven cloud-native technologies that work at scale with the real time and safety features required in automotive applications. The same framework can also benefit other real -time and safety critical applications, such as robotics and industrial automation.

Vehicle manufacturers, system integrators, semiconductor manufacturers, software developers and cloud technology companies have worked together to define SOAFEE (Scalable Open Architecture for Embedded Edge), for the software-defined vehicle. The SOAFEE reference implementation will be free open source software aimed at allowing broad prototyping, workload exploration and early development.

Building on Project Cassini and SystemReady from Arm, which enable a standards-based cloud-native experience at the edge, SOAFEE enables cloud concepts like container orchestration with automotive functional safety and in real time. Arm said it is working with commercial solutions providers to maximise compatibility and provide a faster route to functionally safe designs.

The immediate availability of SOAFEE will empower cloud-based developers to apply their expertise and contribute to vehicle electronics and software-architecture requirements, and driving the industry to a software-centric future.

“At AWS, we’re committed to innovation with key industry players like Arm to help solve complex challenges for delivering software-defined vehicles with a service-oriented architecture,” said Bill Foy, director, worldwide automotive business development at AWS. “In collaboration with Arm, and AWS’s Arm-based AWS Graviton2 instances, we . . . make it possible to run applications on the same architecture in the cloud and at the automotive edge to simplify developer workflow.”

AdLink’s new SystemReady-compatible development platform is powered by Arm Neoverse-based Ampere Altra cores and will allow workload exploration and development on Arm-based silicon using the SOAFEE reference software stack for applications such as cockpit, ADAS, powertrain and autonomous driving. The development platform comprises a developer workstation and a rugged in-vehicle product. It is available for pre-order, with general availability expected in Q4 2021.

Also announced today are the AVA developer platform – a 32-core scalable compute system built for lab-based development. It is capable of running autonomous workloads and allows developers to leverage accelerator hardware to complement CPUs.

For in-vehicle prototyping and testing, the AVA-AP1 has 80 cores for increased CPU performance, extra I/O capabilities and a safety processor to enable in-vehicle execution using real sensors.

In addition to support from AWS, ADLink, Ampere and CARIAD, the initiatives have received broad support from leaders across the supply chain including Apex.AI, Continental, Green Hills Software, Linaro, Marvell, MIH Consortium, Red Hat, SUSE, Woven Planet and Zing Robotics.

http://www.arm.com

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Reference design blends Renesas AHL and OmniVision SoC for vehicle cameras

Automotive HD Link (AHL) technology from Renesas and OmniVision’s OX01F10 SoC are used in an integrated reference design for automotive camera systems. The two companies have developed the reference design in which AHL technology transmits HD video over low-cost cables and connectors. The AHL components pair with OmniVision’s OX01F10 1.3MP SoC, which is claimed to provide the industry’s best imaging performance across a wide range of challenging lighting conditions. It is also compact and has low power consumption, said OmniVison.

The new RAA279971 AHL encoder and RAA279972 decoder use a modulated analogue signal to transmit the video, enabling transmission rates 10 times less than required to transmit HD signals digitally. The lower transmission rate means that unshielded twisted pair (UTP) cables and standard low-cost connectors can be used, as can existing traditional analogue video cables and connectors.

Renesas added that AHL can be paired with other Renesas products, such as the R-Car Automotive SoCs, RH850 MCUs, automotive PMICs, and analogue components to implement numerous safety features in virtually any vehicle.

OmniVision’s OX01F10 SoC integrates a 3.0 micron image sensor and an image signal processor (ISP) with OmniVision’s PureCel Plus technology for low noise, solving the automotive rear view camera and surround view system challenges of achieving a small form factor with low-light performance, low power and reduced cost while improving reliability by enabling single PCB designs.

The 1.3MP OX01F10 supports HDR up to 120dB and the sensor features ASIL-B.

The reference design will be demonstrated at OmniVision’s booth #15 at AutoSens Brussels 2021 Exhibition, September 15 to 16.

The reference design is available through both Renesas and OmniVision.

http://www.renesas.com   

http://www.ovt.com

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Qseven CoM celebrates 15 years with i.MX 8M Plus processor

To celebrate the 15th anniversary of Qseven computer on modules (COMs), congatec has introduced the conga-QMX8-Plus Qseven module based on the NXP i.MX 8M Plus application processor.

It has been introduced as an upgrade for all NXP i.MX 6-based Qseven applications. It brings modern machine learning and AI (artificial intelligence) capabilities as well as time sensitive networking (TSN) support for real-time Ethernet to those applications, said congatec. It will also extend their lifetime by an additional 10 to 15 years.

The i.MX 8M Plus application processor has 1.8GHz Arm Cortex-A53 quad-core performance and an additional integrated neural processing unit (NPU) with up to 2.3Tera operations per second. There is also a DSP that enables speech recognition applications.

The first i.MX processor with a machine learning accelerator, the i.MX 8M Plus provides higher performance for deep learning inference and AI at the edge. Typical power consumption is just 3.0W. The conga-QMX8-Plus module is supported by the 64-bit architecture and onboard LPDDR4 memory with up to 6Gbyte.

The i.MX 8M Plus processor is enhanced with AES encryption for higher cyber security. There is also the Arm TrustZone which integrates the resource domain controller (RDC) for isolated execution of critical software, and secure high assurance boot (HAB) mode to prevent the execution of unauthorised software during boot.

The image signal processor (ISP) for parallel real-time processing of high resolution images is another new feature. It includes H265 decoding / encoding.   

The modules can control up to three independent displays, connected via natively supported HDMI 2.0a, LVDS 2x24bit and MIPI-DSI, and provide hardware accelerated video decoding and encoding including H.265 so that high resolution camera streams delivered by two integrated MIPI-CSI interfaces can be sent directly to the network. For onboard data storage, the modules provide up to 128 GB 5.1 eMMC, which can also operate in safe pSLC mode, as well as one onboard µSD socket. Peripheral interfaces include one PCIe Gen 3, one USB 3.0, three USB 2.0, four UART as well as one CAN FD and 14 general purpose I/O ports. For real-time networking, the module offers 1Gbit with TSN support. There are also two I2S for sound. The supported operating systems include Linux, Yocto and Android.

Target market applications are industrial controls, smart robotics and factory automation to medical health care and retail, and from transportation and smart farming to smart cities and smart buildings.

https://www.congatec.com

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On-device Tensilica AI engine boosts intelligent SoC development

To accelerate AI (artificial intelligence) SoC development, Cadence Design Systems has introduced the Tensilica AI platform which includes three supporting product families optimised for varying data and on-device AI requirements.

Catering for low, mid and high end systems, the Cadence Tensilica AI platform delivers scalable and energy-efficient on-device to edge AI processing for AI SoCs. A companion AI neural network engine (NNE) consumes 80 per cent less energy per inference and delivers more than four times the TOPS/W (Tera operations per second  per Watt) compared to standalone Tensilica DSPs, claimed Cadence.

The platform is intended for intelligent sensor, IoT, audio, mobile vision / voice AI, IoT vision and ADAS (advanced driver assistance system) applications. It is claimed to deliver optimal power, performance and area (PPA) and scalability with a common software platform and is built on the application-specific Tensilica DSPs that are already used In AI SoCs for the consumer, mobile, automotive and industrial markets.

Product families are the AI Base, which includes Tensilica HiFi DSPs for audio / voice, Vision DSPs, and ConnX DSPs for radar / lidar and communications, combined with AI ISA (instruction set architecture) extensions. The AI Boost family adds a companion NNE, initially the Tensilica NNE 110 AI engine, which scales from 64 to 256G operations per second and provides concurrent signal processing and efficient inferencing.

Finally, the AI Max encompasses the Tensilica neural network accelerators (NNA) 1xx AI accelerator family (the Tensilica NNA 110 accelerator and the NNA 120, NNA 140 and NNA 180 multi-core accelerator options, with AI Base and AI Boost technology). The multi-core NNA accelerators can scale up to 32T operations per second, while future NNA products are targeted to scale to 100s of Tera operations per second.

All of the NNE and NNA products include random sparse compute to improve performance, run-time tensor compression to decrease memory bandwidth, and pruning plus clustering to reduce model size.

Comprehensive common AI software addresses all target applications, streamlining product development and enabling easy migration as design requirements evolve. Software includes the Tensilica Neural Network Compiler, which supports TensorFlow, ONNX, PyTorch, Caffe2, TensorFlowLite and MXNet for automated end-to-end code generation; Android Neural Network Compiler; TFLite Delegates for real-time execution; and TensorFlow Lite Micro for microcontroller-class devices.

The NNE 110 AI engine and the NNA 1xx AI accelerator family support Cadence’s Intelligent System Design strategy, which enables pervasive intelligence for SoC design excellence, and are expected to be in general availability in Q4 2021.

http://www.cadence.com.

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