Sector News

Radio unit developers can use the RadioVerse SoC to create the most energy efficient 5G radio units, says Analog Devices. 

The ADRV9040 is the first in the RadioVerse SoC series. It offers eight transmit and receive channels of 400MHz bandwidth and integrates advanced digital signal processing functions, including carrier digital up converters (CDUC), carrier digital down converters (CDDC), crest factor reduction (CFR) and digital pre-distortion (DPD). This expanded signal processing can eliminate the need for an FPGA, thereby reducing thermal footprint, and total system size, weight, power, and cost, advises Analog Devices. 

The SoC’s DPD algorithms were developed using advanced machine learning techniques and are optimised in close collaboration with major power amplifier (PA) vendors. The algorithms are fully tested and validated across 4G and 5G use cases, including various PA technology types such as gallium nitride (GaN). 

The SoC series provides advanced RF signal processing with expanded digital functionality and RF capacity designed to improve 5G radio unit performance and energy efficiency. The SoCs have been added to Analog Devices’ RadioVerse ecosystem. They combine Analog Devices’ Zero IF (ZiF) architecture with advances in functional integration and linearisation. The ZiF radio architecture simplifies RF filtering and signal chain components, reducing radio unit cost and development time for band and power variants designs, claims Analog Devices.

 Software defined RadioVerse transceivers are used in 4G and 5G RUs worldwide. Analog Devices has worked with Samsung to deploy 5G for some time. Dong Geun Lee, vice president and head of Hardware R&D Group, Network Business at Samsung Electronics, said: “We are excited for the successful launch of ADI’s new SoC, as we expect this cutting-edge technology will bring better 5G experience to consumers.”

Network operators are demanding power efficient radio units in the race to deploy the 5G infrastructure. With the exponential growth of wireless demand, energy efficiency is a key metric for operators as they seek to reduce their carbon footprint while expanding network capacity, says Analog Devices. The RadioVerse SoC series requires very low power compared to alternatives and implements advanced algorithms that deliver optimal radio unit system efficiency, says the company.

“RadioVerse SoCs are designed to optimise the full radio solution rather than just a single component or interface,” said Joe Barry, vice president of Wireless Communications at Analog Devices. “Each successive generation has provided expanded capabilities, bandwidth and performance, while improving overall [radio unit] efficiency. This new RadioVerse SoC series takes a big step forward by delivering multiple advancements in signal processing to meet the demanding needs of 5G,” he says.

http://www.analog.com

Motor control in inverter appliances, building automation and industrial drives can benefit from the RA6T2 family of microcontrollers (MCUs), says Renesas Electronics. They are claimed to achieve higher performance and cost-efficient motor control and are supported with motor control tools and design kits. 

The RA6T2 MCUs feature peripheral functions and hardware accelerator designed specifically for motor control. They are intended for used in motor control designs in home appliances, smart home, industrial and building automation as well as inverter control. 

The 32-bit MCUs are based on the 240MHz Arm Cortex-M33 core, with 512kbyte flash ROM, 64kbyte SRAM and 16kbyte data flash.

Two independent ADC units offer high-speed conversion with a maximum speed of 0.16 microseconds and include a simultaneous sample and hold function for three channels to detect the three-phase current of a motor. Integral amplifiers can set gain according to the input voltage range and analogue components that were previously external are incorporated, including comparators which detect abnormal voltage input and over current. An adjustable PWM timer makes it easy to port existing algorithms. It also provides a PWM output cut-off safety function in the event of an abnormality. This feature set allows a single RA6T2 MCU to simultaneously control up to two brushless DC (BLDC) motors, says Renesas.

The embedded hardware accelerator includes both a trigonometric function unit (TFU) and an infinite impulse response (IIR) filter to offer increased performance and reduced CPU load enabling parallel tasks such as communication.

The TFU performs high speed calculations without the need for lookup tables, for effective use of ROM. The IIR filter offers co-efficient setting methods that make it easier to port from existing algorithms, says the company.

The RA6T2 MCUs are available in five package options, which are a 100-pin LQFP, 64-pin LQFP, 48-pin LQFP, 64-pin QFN and 48-pin QFN. 

They are supported by Renesas’ Flexible Software Package (FSP) for porting designs from other Renesas MCUs.

Renesas is also offering a range of design tools, including the RTK0EMA270S00020BJ motor control kit, a CPU board, an inverter board and a motor work bench graphical user interface (GUI) tool with real-time debugging and digital oscilloscope functionality. 

http://www.renesas.com