Initial families in the N series of the MCX microcontroller portfolio have been released by NXP. The MCX N microcontrollers include what is believed to be the industry’s first instantiation of a specialised, NXP-designed NPU (neural processing unit) to enable high performance, low power secure intelligence at the edge
The MCX N94x and MCX N54x are the first families in the N series. According to NXP, they simplify design for secure intelligent edge applications, including IoT and industrial applications. They are based on NXP’s proprietary NPU and have an integrated EdgeLock secure subsystem.
According to NXP, the MCX N series converts edge data into edge intelligence, for increased processing, while minimising the power budget. The microcontrollers have a choice of analogue and digital peripherals.
“Developers are increasingly looking to push the boundaries of what’s possible at the edge as they create new devices that can better anticipate and automate in smart homes, smart factories and smart cities,” commented Rafael Sotomayor, executive vice president and general manager of edge processing and connectivity and security at NXP. “This requires advanced MCUs that are more efficient, simplify edge intelligence and do all of that securely,” he said.
The MCX N94x and MCX N54x are based on dual high-performance Arm Cortex-M33 cores running up to 150MHz, with 2Mbyte of flash with optional full ECC RAM, a DSP co-processor for audio and voice processing and integrated NPU. The integrated NPU delivers up to 30x faster machine learning throughput compared to a CPU core alone, as well as multiple co-processors and accelerators, enabling it to spend less time awake and reducing overall power consumption.
In addition, NXP’s eIQ machine learning software development environment provides tools to train and support machine learning models using the integrated NPU.
The MCX N94x features a wide variety of analogue and motor control peripherals, while the MCX N54x includes peripherals ranging from high speed USB with PHY to SD or smart card interfaces suitable for IoT and consumer applications.
Both are built following NXP’s secure-by-design approach, offering secure boot with an immutable root of trust, hardware accelerated cryptography and a built-in EdgeLock secure subsystem. This architecture provides support for in-field updates, online transactions, and protection against over-production at remote original design manufacturers (ODMs).
The MCX N devices are supported by the MCUXpresso suite of software and tools.
The suite includes tools for simple device configuration and secure programming. Developers can choose to work with the MCUXpresso IDE (integrated development environment) or with IDEs from IAR and Keil. NXP provides drivers and middleware with extensive examples and support for a range of RTOS choices, with a wide range of compatible middleware from NXP’s partner ecosystem.
The MCX N series is expected to begin sampling in Q1 2023.
http://www.nxp.com
