Integrated wireless power transmitter IC supports Qi extended power profile

Infineon Technologies has extended its portfolio of wireless charging controller ICs, adding the WLC1150 which supports up to 50W applications. 

The wireless charging controller ICs are designed for applications requiring higher wireless power transfer, for example industrial applications, healthcare equipment, robotics and drones, vacuum cleaners, power tools, docking stations, and smartphone chargers supporting the Qi Extended Power Profile (EPP).

The WLC1150 transmitter is designed to provide high efficiency, flexible thermal management options, low electromagnetic interference (EMI), integrated adaptive foreign object detection (FOD) and inverter control. It uses multiple methods to tune the adaptive FOD, including Q-factor, resonant frequency and power.

The transmitter supports 50W wireless power transfer using a high power proprietary charging protocol and a wide input voltage range of 4.5 to 24V. The integrated fan buck controller enables thermal management by cooling the interface surface during high power delivery. It also includes integrated gate drivers for the inverter, which is controlled by frequency, duty cycle and variable voltage.

It also integrates a USB type-C power delivery (PD) controller that supports the latest version of USB-PD 3.1 with programmable power supply (PPS) mode. The WLC1150 complies with the WPC Qi 1.3 with EPP, basic power profile (BPP), and proprietary power delivery extension (PPDE). It supports systems with input power supplied from either USB PD / PPS or fixed input from a DC power supply. With either input configuration, the transmitter does not require a front-end DC/DC converter. This helps to significantly improve system efficiency, confirmed Infineon.

Adjustable over-voltage protection (OVP), over-current protection (OCP), and over-temperature protection (OTP) are also supported. The WLC1150 transmitter IC can be paired with the upcoming WLC1250 receiver IC to realise end-to-end proprietary wireless power transfer solutions, Infineon advised.

The WLC1150 is based on a programmable 32-bit Arm Cortex-M0 processor equipped with 128kbyte flash, 16kbyte RAM and various peripherals such as ADC, PWMs and timers. Its full-stack firmware is configurable to allow customisation of application-specific FOD, in-band communication, sensing, protection and other system parameters. This is made possible by a GUI (graphical user interface) that eliminates the need for code debugging and streamlines the configuration process. Combined with Infineon’s ModusToolbox, the WLC1150’s programmable features enable users to develop scalable wireless charging for proprietary protocols as well as the latest Qi specification.

The IC WLC1150 integrated wireless charging transmitter for high power applications is available in a 68 pin 8.0 x 8.0mm² in tray, as well as tape and reel packages. It is available for order now.

The WLC1150 will be showcased at PCIM Europe 2023 (09 to 11 May) in Nuremberg, Germany, at Infineon’s stand in Hall 7 (7-412).

http://www.infineon.com

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Magnachip introduces 600V SJ MOSFETs with fast recovery body diodes

Magnachip has introduced 600V super junction MOSFETs with RDS(on) as low as 44 mOhm for EV chargers and servers. There are nine products in the 600V MOSFET family, featuring the proprietary design technology.

Magnachip’s design provides specific on-resistance (RSP) reduction of about 10 per cent, achieved while maintaining the same cell-pitches of previous generation MOSFETs.

The 600V super junction MOSFETs are equipped with a fast recovery body diode. The proprietary technology significantly enhances system efficiency with reduced reverse recovery time (trr) and switching loss. Therefore, the figure of merit to evaluate general performance of MOSFETs was improved by more than 10 per cent compared to the previous generation, said Magnachip. The 600V super junction MOSFETs can be used widely in industrial applications, such as solar inverters, energy storage systems, uninterruptible power supply systems, and a variety of electronics.

One of the nine MOSFETs is the MMQ60R044RFTH which offers a low RDS(on) of 44 mOhm, making it suitable for electric vehicle chargers and servers. 

“Now that we have introduced these 600V SJ MOSFET products, we are aiming to unveil new 650V and 700V SJ MOSFET products with fast recovery body diode in the second half of 2023,” said YJ Kim, CEO of Magnachip. 

Magnachip Semiconductor is a designer and manufacturer of analogue and mixed-signal semiconductor platforms for communications, IoT, consumer, computing, industrial and automotive applications. The company has more than 40 years’ of operating history, owns a portfolio of approximately 1,100 registered patents and pending applications, and has extensive engineering, design and manufacturing process expertise. 

http://www.magnachip.com

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Axelera IP uses Arteris IP to accelerate edge computer vision 

The Metis AI platform for AI at the edge is based on Arteris FlexWay IP. The network on chip system IP allows engineers to meet performance and power objectives while reducing time to market, said Arteris.

Arteris FlexWay IP will be used for SoC connectivity in the Metis AI platform, which is a hardware and software platform for computer vision AI inference at the edge.

The Metis AI processing unit (AIPU), as part of the Metris AI Platform, is equipped with four homogeneous AI cores built for complete neural network inference acceleration. Each AI core is self-sufficient and can execute all layers of a standard neural network without external interactions. The four cores are integrated into an SoC and comprised of a RISC-V controller, PCIe interface, LPDDR4X controller, and a security complex connected via a high speed network on chip (NoC). The unit can collaborate on a workload to boost throughput or operate on the same neural network in parallel to reduce latency. It can also process different neural networks required by the application concurrently.

Giuseppe Garcea, director of silicon and co-founder at Axelera AI, said: “Arteris FlexWay interconnect IP allowed us to close timing smoothly on a complex, multicore machine learning architecture”.

Arteris FlexWay interconnect IP uses area-optimised interconnect components to address a smaller class of SoC. The architecture has been designed to be compatible with Arm AMBA AXI and AHB standards. It provides a scalable solution to ultra-low power consumption and the automation of interconnect SoC connectivity.

Arteris provides system IP for the acceleration of SoC development across electronic systems. Arteris network on chip (NoC) interconnect IP and IP deployment technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics.

Axelera AI designs AI at the edge. Its Metis AI platform is a holistic hardware and software solution for AI inference at the edge. It enables computer vision applications to become more accessible, powerful and user-friendly, claims the company. 

Headquartered in the AI Innovation Center of the High Tech Campus in Eindhoven, Axelera AI has R&D offices in Belgium, Switzerland, Italy and the UK. Its team of experts in AI software and hardware hail from top AI firms and Fortune 500 companies. 

The Metis AI platform is available for pre-ordering at the Axelera AI website and a select group of customers via the Early Access Program.  

https://www.arteris.com 

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Design flows are based on the Integrity 3D-IC platform 

Design flows based on the Integrity 3D-IC platform have been announced by Cadence Design Systems to support the TSMC 3Dblox standard for 3D front end design partitioning in complex systems. 

Cadence flows are optimised for all of TSMC’s latest 3DFabric offerings, including integrated fan-out (InFO), Chip-on-Wafer-on-Substrate (CoWoS) and System-on-Integrated-Chips (TSMC-SoIC) technologies. By using these design flows, customers can accelerate the development of advanced multi-die package designs for emerging 5G, AI, mobile, hyperscale computing and IoT applications, said Cadence.

The Cadence Integrity 3D-IC platform combines system planning, packaging, and system level analysis and is certified for use with the TSMC 3DFabric and the 3Dblox 1.5 specification. The flows based on this platform incorporate new features like 3D routability-driven bump assignment and hierarchical bump resource planning. 3Dblox, which is inherently supported by the Integrity 3D-IC platform, provides a seamless interface for Cadence system analysis tools for early power delivery network (PDN) and thermal analysis via the Cadence Voltus IC Power Integrity Solution and Celsius Thermal Solver system analysis tools; extraction and static timing analysis via the Cadence Quantus Extraction Solution and Tempus Timing Signoff and system level layout versus schematic (LVS) checks via the Cadence Pegasus Verification system.

“3D-IC technology is key to meeting the performance, physical size, and power consumption requirements to enable next-generation HPC and mobile applications,” said Dan Kochpatcharin, head of the design infrastructure management division at TSMC. “By continuing our collaboration with Cadence, we’re enabling customers to leverage our comprehensive 3DFabric technologies and the Cadence flows that support our 3Dblox standard, so they can significantly improve 3D-IC design productivity and speed time to market,” he added.

“The Cadence flows based on the Integrity 3D-IC platform incorporate everything a customer needs to quickly design a leading-edge 3D-IC using TSMC’s latest 3DFabric technologies,” added Dr. Chin-Chi Teng, senior vice president and general manager in the digital and signoff group at Cadence.

The Cadence Integrity 3D-IC platform, including Allegro X packaging technologies, is part of the company’s broader 3D-IC offering and aligns with the Cadence Intelligent System Design™ strategy, enabling SoC design excellence. The Cadence reference flows and tutorials are available on TSMC Online now.

http://www.cadence.com

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