ADI announces quad-channel member of RadioVerse family

Designed to support base station applications (including single and multi-standard 3G/4G/5G macrocell base stations, massive multiple input multiple output (M-MIMO), and small cell systems, the ADRV9026 is the latest member of Analog Devices’ RadioVerse family.

The quad-channel, wideband RF transceiver offers quad-channel integration with the lowest power, smallest size, common-platform solution, according to Analog Devices.

It is supplied in a 14 x 14mm BGA package and is claimed to be the smallest size, lowest power transceiver for base transceiver stations. The small size reduces footprint and enhances form factor flexibility.

It also reduces power consumption by 50% compared with the previous generation, ADVR9009, for increased radio density and enables open radio access network (ORAN) small cell designs with lowest system power and cost, the company continued.

The integrated, high performance software defined radio supports up to 200MHz bandwidth and covers all bands from 650MHz to 6GHz.

Other features are the quad-channel transmitters and receivers with dual-channel observation receivers, local oscillator (LO) frequency of 650 to 6,000MHz and a maximum receiver/transmitter bandwidth of 200MHz. Maximum observation receiver/transmitter synthesis bandwidth is 450MHz.

There is also multi-chip phase synchronisation for all local oscillators and baseband clocks.

Future software upgrades for new features will include external local oscillator support, extending the local oscillator frequency down to 75MHz, with Filter Wizard to support custom profiles.

A common platform design for 3G, 4G and 5G reduces complexity, development costs and time to market, says Analog Devices. The single-chip FDD/TDD simplifies hardware and software development and a common application programming interface addresses multiple applications.

For macro base stations or small cell designs the ADVR9009 reduces product development cycles for band and power variants and enables modular architecture for scalable radio solutions. An evaluation kit is also available.

http://www.analog.com

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Temperature sensor delivers power savings for mobile monitoring

Typical temperature reading accuracy of 0.25 degrees C, low operating and standby current, make the STMicroelectronics STTS22H temperature sensor particularly suitable for temperature and heat-flow monitoring in asset trackers, shipping-container loggers, HVAC systems, air humidifiers, refrigerators, building automation systems and smart consumer devices, says the company.

The STTS22H is I2C- and SMBus 3.0-compliant and supports flexible operating modes including configurable output data rate (ODR) down to 1Hz, a power-saving one-shot mode and an interrupt pin that supports SMBus alert response address (ARA). This allows the sensor, as an SMBus slave, to signal the application if a user-programmed upper or lower temperature threshold is exceeded. Programmable I²C/SMBus slave addresses allow up to two STTS22H sensors to share the same bus.

Power consumption is very low, drawing just 2.0 microA at 1Hz ODR and 1.75 microA during periodic one-shot measurements, to extend the running time of battery-powered devices. In standby mode with the serial port inactive, the STTS22H draws just 0.5 microA (typical). The 1.5 to 3.6V operating voltage range allows use with various power sources such as a small lithium cell.

The fast-acting sensor has a conversion time of 5milliseconds and provides 16-bit temperature data. The package’s metal slug minimises thermal resistance to ensure fast settling at the ambient temperature, says ST. The sensors are delivered factory-calibrated and maintain the 0.25 degrees C typical accuracy from -10 to 60 degrees C, eliminating any need for user calibration.

The STTS22H is in production now as a compact , low-profile 2.0 x 2.0 x 0.5mm, six-lead UDFN.

http://www.st.com

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Intel introduces GPU architecture for HPC/AI

At this week’s Intel HPC Developer Conference in Denver, Colrado, USA this week, Raja Koduri,  senior vice president, chief architect, and general manager of architecture, graphics and software at Intel (pictured), introduced a new category of discrete general-purpose GPUs optimised for artificial intelligence (AI) and high performance computing (HPC) convergence.

The Ponte Vecchio general purpose GPU is based on the Xe architecture.

“HPC and AI workloads demand diverse architectures, ranging from CPUs, general-purpose GPUs and FPGAs, to more specialised deep-learning neural network processors (NNPs), which Intel demonstrated earlier this month,” said Koduri.

Ponte Vecchio is architected for HPC modeling and simulation workloads and AI training. It will be manufactured on Intel’s 7nm technology and will be Intel’s first Xe-based GPU optimised for HPC and AI workloads. Ponte Vecchio will leverage Intel’s Foveros 3D and EMIB packaging and feature high-bandwidth memory, Compute Express Link interconnect and other IP in one package.

Intel also launched the oneAPI initiative to define programming for an AI-infused, multi-architecture world. oneAPI delivers a unified and open programming experience to developers on the architecture of their choice without compromising performance and eliminating the complexity of separate code bases, multiple-programming languages, and different tools and workflows. It preserves existing software investments with support for existing languages while delivering flexibility for developers to create versatile applications.

The oneAPI specification includes a direct programming language, powerful application programming interfaces (APIs) and a low-level hardware interface. Intel’s oneAPI beta software provides developers a comprehensive portfolio of developer tools that include compilers, libraries and analysers, packaged into domain-focused toolkits. The initial oneAPI beta release targets Intel Xeon Scalable processors, Intel Core processors with integrated graphics and Intel FPGAs, with additional hardware support to follow in future releases.

Developers can download the oneAPI tools, test drive them in the Intel oneAPI DevCloud.

http://www.intel.com

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Aetina quadruples AI power efficiency

To support the demand for more smart applications for AI embedded system and application developers, Aetina offers a series of system on modules (SoMs) built with Nvidia Jetson modules. The company has compared its Nvidia Jetson AGX Xavier edge computing platform with the RTX 2080 graphics card. Using the Aetina Jetson AGX Xavier AI computing platform, which has 512 CUDA computing cores and 11 TFLOPS of AI computing inference, the company compared the Nvidia RTX 2080 high-performance graphics card which provides 20.14TFLOPS computing performance, but it needs 225W for operation. However, with the Xavier platform, it only cost 30W for operation, bringing 0.367 TFLOPS/W, for a four-fold improvement in AI performance effciency, reports Aetina, compared to RTX 2080’s 0.09 TFLOPS/W. The Xavier platform supports various I/O extension, external high-speed Net card, and flexible match with different camera modules. As an SoM platform, the Aetina Xavier platform is easy to deploy at any edge position in the embedded IoT environment, lower the AI latency, and bring a perfect AIoT (AI of things) chain at the edge.

Using the software, the Aetina R&D team optimised the Openpose algorithm, to detect human skeletons and capture several people in real-time. With the data from the skeleton, it can define the pose with action, execute a higher-level application.

With Aetina Jetson AGX Xavier edge AI computing platform, high-performance with low power consumption can realise an AI application of collapse detection in the intelligent medical sector and also conduct customer behaviour analysis in smart retail applications.

Aetina was founded in Taiwan in 2012, as a support provider of high-performance GPGPU and Jetson edge AI computing solutions for embedded applications. The company focuses on the industrial market, providing industrial components and longevity of service.

http://www.aetina.com

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