Thermoelectric coolers operate in high temperatures for ADAS

High-temperature autonomous systems require active cooling to ensure proper, long life performance. Laird Thermal Systems has designed thermoelectric coolers specifically to operate in high temperature environments such as advanced driver assistance systems (ADAS) and other autonomous systems applications.

Active cooling is required to ensure the reliable operation of the imaging sensors, cameras and lasers used in ADAS and autonomous vehicles. The reason for this is that most of these optical devices, including CMOS sensors and laser diodes, are heat-sensitive and rely on high resolution images for proper operation.

“ADAS systems cannot operate without the continuous capture of high-resolution images. In autonomous vehicle applications, for example, as many as 12 imaging sensors are operating simultaneously to create a 360 degree view around the vehicle, so failure is not an option,” said Andrew Dereka, product director at Laird Thermal Systems.

Image quality can quickly deteriorate as the device temperatures rise above 60 degrees C, advises Laird. In ADAS applications, where temperatures can reach +85 degrees C, passive cooling of laser and CMOS sensor using thermal greases and heat sinks can lead to premature system failure, threatening road safety.

Using thermolectrics for active cooling pumps heat away from sensitive electronics while the surrounding environment remains hot. Laird Thermal Systems’ HiTemp ETX series of thermoelectric coolers are specifically designed to operate in high-temperature environments.

The solid state heat pump devices do not have moving parts, fluids or gasses. Utilising the Peltier effect, thermoelectric coolers offer an efficient cooling system for a wide range of optical sensors used in ADAS, collision avoidance and other autonomous system technologies. The HiTemp ETX series thermoelectric coolers have a cooling capacity from 7.0 to 322W to effectively cool components in temperatures up to +120 degrees C. While standard thermoelectric materials can reach temperature differentials up to 78 degrees C with Th of 50 degrees C, the HiTemp ETX thermoelectric cooler creates a maximum temperature differential of 83 degrees C, reports Laird.

Serving applications with tight geometrical space constraints, the HiTemp ETX thermoelectric coolers have a compact footprint. The thermoelectric coolers can be integrated directly into the laser or CMOS sensor assembly to provide more effective spot cooling. A heat sink or other heat exchanger rapidly dissipates heat away from sensitive components. The HiTemp ETX thermoelectric cooler’s design also prevents thermal shorting and protect sensors from moisture intrusion and outgassing.

The HiTemp ETX series includes more than 50 models with a variety of heat pumping capacities, sizes and voltage inputs.

https://www.lairdthermal.com

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Max-M12 connector supports high-speed transmission in harsh environments

Amphenol Industrial Operations has enhanced its Max-M12 product line to include an X coding, high-speed connector with support for 10Gbits per second (1000M Ethernet with CAT6 cable) data transmission and S coding for a safer connection with ‘first mate last break’. The connectors are for use in the rail and mass transit (RMT), heavy equipment vehicles, industrial automation and robotics markets.

When used on RMT door systems, on camera and communication systems, as well as on heating, ventilation, air conditioning (HVAC) systems, the Max-M12 can transmit high speed data in environments where there is high vibration, moisture, salt, dirt and debris. It can also be used for off-road vehicles, ruggedised factory automation and robotics signal applications.

The Max-M12 family of connectors is based on IEC 61076-2-101 and SAE J2839. They are backwards-compatible and can be mated with any standard M12 connector with the same indexing, assures Amphenol. The Max-M12 features several mounting options, including front or back lock/flange and wire termination styles, including solder, crimp and printed circuit tails.

The Max-M12 is rated to 4.0A and can endure extreme temperatures ranging from -55 to +125 degrees C.

All Max-M12 connectors have an IP67 rating making them dust and waterproof. They are resistant to high pressure wash downs and water immersion.  Amphenol has plating designed to endure salt spray testing for up to 240 hours for use in harsh environments.

Amphenol’s Max-M12 connector in-line mated pair can withstand 444N of connector-to-cable retention forces and contact retention forces to 110N. Housed in an HDM 12 EX impact resistant metal or plastic shell, the in-line mated pair is available as a 90 degrees right angle or straight versions. When shielding is required the Max-M12 metal version is available in multiple shell styles for a variety of interconnect requirements.  Both the four- and five-pin configurations are available with A, B and D polarity codes.

Amphenol Industrial Operations is headquartered in Endicott, New York, USA, providing a range of high reliability power/signal connectors and interconnection systems specifically for the industrial markets including rail/mass transit, process control, automotive manufacturing, heavy equipment, wireless base stations and petrochemical/power generation.

Its product range includes ruggedised-for-industry cylindrical, fibre optic, rectangular, and industrialised versions of Amphenol’s MIL-DTL-5015 cylindrical, MIL-DTL-26482 miniature cylindrical and GT reverse bayonet cylindrical connectors. It is ISO9001, TS96949 and MIL-STD-790-certified.

Amphenol Industrial Operations is a division of Amphenol, one of the largest manufacturers of interconnect products in the world.

http://www.amphenol-industrial.com

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Open source software stack eases security integration, says Infineon

Trusted Platform Modules (TPM) enable secured remote software updates, disc encryption and user authentication in connected embedded devices in industrial and automotive applications. Infineon provides its Optiga TPM 2.0 software stack to facilitate seamless integration in Linux-based systems. The TPM software stack implements the latest feature application programming interface (FAPI) standard. Infineon has developed the open-source software jointly with Intel Corporation and Fraunhofer Institute for Secure Information Technology (SIT).

According to Infineon, using the Optiga TPM 2.0 allows IoT system integrators to “significantly improve” the security of connected products. Software integration with TPM software stack (TSS) -FAPI does not require specific skills in low-level security specifications and reduces source code development by a factor of up to 16, claims Infineon. This can result in reduced time to market as manufacturers can accelerate the process for certifying industrial devices according to the IEC 62443 standard for industrial applications, which requires hardware-based safety from level 4 upwards.

The FAPI specification was released as an international standard by the Trusted Computing Group (TCG). The specification is implemented in the TSS stack 1 with the associated tools and plug-ins. The TSS stack is open source software, which allows seamless integration of the TPM 2.0 in Linux-based systems. This includes the support of typical Linux software for device authentication, data encryption, software updates and remote device management.

The FAPI enables the native support of the PKCS#11 standard as a generic interface for user authentication, single sign-on and email encryption/signing. The FAPI provides a default configuration for cryptographic functionalities, system integration and automated processing of security mechanisms, says Infineon.

The Optiga TPM acts as a vault for sensitive data in connected devices and lowers the risk of data and production losses due to cyber attacks. Infineon’s TPMs are certified by independent certification bodies according to the Common Criteria, an international set of guidelines and specifications developed for evaluating information security products. The TSS stack including the recent FAPI has been verified to achieve compliance and interoperability.

Application developers can use the Optiga TPM SLB 9670, Optiga TPM SLI 9670 and Optiga TPM SLM 9670 Iridium boards and TSS Quickstarter now. There are also board and source code packages for the Infineon Aurix and for the Arduino microcontrollers.

http://www.infineon.com

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First IP for PCI Express 6.0 has low latency for HPC and AI

IP that supports the latest features in the PCI Express (PCIe) 6.0 specification has been released by Synopsys. The DesignWare IP can be used for early SoC development, high performance computing and artificial intelligence (AI).

The IP for PCIe 6.0 includes controller, PHY and verification IP, for early development of PCIe 6.0 SoCs. It supports the latest features in the standard specification including, 64 GT/s PAM-4 signalling, FLIT mode and L0p power state. Acccording to Synopsys the IP addresses evolving latency, bandwidth and power-efficiency requirements of high performance computing (HPC), AI and storage SoCs.

To achieve the lowest latency with maximum throughput for all transfer sizes, the DesignWare Controller for PCI Express 6.0 uses a MultiStream architecture, delivering up to x2 the performance of a single-stream design. The controller, with available 1024bit architecture, allows designers to achieve 64Gtransfers per second x16 bandwidth and closing timing of 1GHz. The controller provides optimal flow with multiple data sources and in multi-virtual channel implementations. To facilitate accelerated testbench development with built-in verification plan, sequences and functional coverage, the VC Verification IP for PCIe uses native SystemVerilog/UVM architecture that can be integrated, configured and customised.

Synopsys’ DesignWare PHY IP for PCIe 6.0 provides adaptive DSP algorithms that optimise analogue and digital equalisation to maximise power efficiency regardless of the channel. The PHY enables near zero link downtime using patent-pending diagnostic features. The placement-aware architecture of the DesignWare PHY IP for PCIe 6.0 minimises package crosstalk and allows dense SoC integration for x16 links, added Synopsys. The datapath is optimised with ADC-based architecture for low latency.

The DesignWare Controller and PHY IP for PCIe 6.0 early access are scheduled to be available in Q3 of 2021. The Verification IP for PCIe 6.0 is available now.

Synopsys develops silicon-proven IP for SoC designs. The DesignWare IP portfolio includes logic libraries, embedded memories, PVT sensors, embedded test, analogue IP, wired and wireless interface IP, security IP, embedded processors and sub-systems. Synopsys’ IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems accelerate prototyping, software development and integration of IP into SoCs. The company’s invests in IP quality, comprehensive technical support and robust IP development methodology to enable designers to reduce integration risk and accelerate time-to-market.

Image credit- iStock,DKosig

https://www.synopsys.com

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