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Developer kit accelerates AI vision

Mon, Aug 02, 2021

To accelerate proof of concept, rapid prototyping and small series production, Vision Components has collaborated with AU-Zone and Toradex to create the Maivin i.MX 8M Plus AI vision kit.

The developer kit is based on a Toradex Verdin i.MX 8M Plus system on module (SoM) and a carrier board designed by AU-Zone which accommodates up to two VC MIPI camera modules.

NXP’s i.MX 8M Plus processor has a neural network processor unit (NPU) and an integrated image signal processor. The Verdin SoM for the kit has been extended by a variable SoM adapter and connector board from AU-Zone, which enables users to build functional models. The VC MIPI IMX327-C (colour) and VC MIPI IMX296 (monochrome) camera modules are combined with the required interfaces and I/Os for individual rapid prototyping up to small series. Additional VC camera modules are also compatible. The AU-Zone connector boards can also be custom-developed with interfaces and functionalities for individual requirements. This makes the Maivin i.MX 8M Plus AI vision kit for a range of applications, including automation and robotics, medical technology or the agricultural industry. The kit also includes a housing, including lighting.

Drivers ensure optimal image processing, says Vision Components, which enable the direct connection and support of the VC MIPI camera modules with the NXP i.MX 8M processor family. They have been integrated into Toradex’ software platform, TorizonCore, which allows access to the image signal processor (ISP) of the i.MX 8M Plus. The ISP can be used for advanced image pre-processing such as colour conversion, geometry correction, HDR and gamma correction. The software platform also includes comprehensive frameworks for an easy entry into development, over the air updates and security features.

The kit also includes AU-Zone’s DeepView machine learning toolkit is also part of the Maivin i.MX 8M Plus AI vision kit. It includes machine learning demos for object recognition, classification, and tracking that can be customised to the users own AI models and datasets using the NXP eIQ toolkit. NXP continues to add tools to the development environment, including a GUI-based interface, and the DeepViewRT engine which is optimised for the i.MX platform. The company also added that other applications, for example AU-Zone applications, can be integrated and used to develop vision systems.

Vision Components drivers for the NXP i.MX 8M processor family are also available for platforms in addition to the Toradex Verdin SoM series platforms.

The kit is scheduled to be ready for shipping in Q3 2021.

http://www.vision-components.com

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Microchip unveils single chip for network synchronisation

Fri, Jul 30, 2021

Offering precise timing for 5G radio access equipment, the ZL3073x / 63x / 64x network synchronisation platform combines integration and performance in one compact, low-power device, says Microchip.

For 5G, time sources need to be synchronised throughout a packet-switched network 10 times more accurately than 4G requirements. The devices makes it possible to achieve 5G performance with what is claimed to be the first single chip, highly integrated, low power, multi-channel IC coupled with the company’s IEEE 1588 precision time protocol (PTP) and clock recovery algorithm software modules.

The ZL3073x / 63x / 64x network synchronisation platform implements sophisticated measure, calibrate and tune capabilities, which reduces network equipment time error to meet the most stringent 5G requirements, said Rami Kanama, vice president of Microchip’s timing and communications business unit.

Microchip’s measure, calibrate and tune capabilities ensure 5G systems achieve ITU-T Standard G.8273.2 Class C (30ns max|TE|) and the emerging Class D (5ns max|TEL|) time error requirements. The architecture offers up to five independent digital phase locked loop (DPLL) channels while consuming only 0.9W in a compact 9.0 x 9.0mm package that simultaneously reduces board space, power and system complexity.

There are five low-jitter synthesisers which offers 100 femto second root mean square (rms) jitter performance required by high speed interfaces in the latest 5G radio unit, distributed unit and central unit systems.

Microchip’s network synchronisation platform software includes its ZLS30730 high-performance algorithm coupled with its ZLS30390 IEEE 1588-2008 protocol engine. The network synchronisation platform combines seamlessly with Microchip’s family of precision 5G oscillators, adds the company. Its portfolio also includes clock generation, fanout buffer and jitter attenuator solutions as well as quartz and MEMS oscillators and Ethernet physical layer (PHY) devices.

A graphical user interface (GUI) and evaluation board are also available, along with application notes and other design-in support tools.

The ZL3073x / 63x / 64x network synchronisation platform is available in production quantities and offered with IEEE 1588 PTP and algorithm software modules, which are provided through license terms for download.

http://www.microchip.com

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Xtensa processors meet ISO 26262 compliance to ASIL-D

Thu, Jul 29, 2021

Cadence Tensilica Xtensa processors with FlexLock capability meet the ISO 26262:2018 standard to ASIL-D, the highest level possible under the Automotive Safety Integrity Level rating. The functional safety certification spans from base microcontroller to high-performance DSP, each with a configuration option for FlexLock to provide increased random fault protection. The processor have been developed following a robust safety process to protect against systematic faults. Tensilica Xtensa processors with FlexLock are suitable for the automotive market and tailored for AI, vision, radar, lidar, audio, vehicle-to-everything (V2X), and control applications.

The Cadence Tensilica FlexLock processors optimised for automotive applications are among the first in the industry to achieve full compliance with ASIL-D functional safety standards, said Wolfgang Ruf, head of functional safety for semiconductors at SGS-TÜV Saar. “Certification to . . . . the ISO 26262:2018 standard for ASIL-D systematic and random fault avoidance is a testament to the high functional safety quality of Cadence’s IP. SoC designers are assured that their designs using functional safety-certified Tensilica processor IP can achieve compliance with the automotive industry’s stringent safety-critical requirements,” he added.

Key to ASIL-D compliance is the new FlexLock capability, which adds lockstep support to the flexible and extensible Xtensa processor architecture. Lockstep is a proven method for increasing safety in software execution by providing redundancy of the core logic at the hardware level. In addition to ASIL-D certification, FlexLock also gives design teams the ability to accommodate two cores running independently in ASIL-B solutions and the option of running local memories and caches of two cores in lockstep, achieving even greater levels of protection against memory faults.

“Higher levels of autonomy require more intelligent computing at the edge in automotive applications, which is driving the need for higher levels of functional safety,” said Larry Przywara, senior group director, Tensilica marketing at Cadence. “With the introduction of FlexLock capability, users of Tensilica controllers and DSPs can achieve the highest level of certification, ASIL-D, and the protection it brings against random hardware faults. Designers choosing Tensilica IP to accelerate their ADAS [advanced driver assistance systems], radar, lidar, V2X and vision processing can do so with the confidence that they can meet their customers’ functional safety requirements.”

As with other Xtensa processors, the ASIL-D certified cores can be customised using the Tensilica Instruction Extension (TIE) language. This allows the IP to be optimised for the specific application, combining the right level of performance with the highest levels of safety.

The Tensilica Xtensa processors with FlexLock capability are available now.

http://www.cadence.com

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Neural network detects faces in 12milliseconds

Wed, Jul 28, 2021

Faces can be detected in video and still images at 12 milliseconds per inference in the Detectum neural network created by Xailient. The IoT face detection system uses Maxim Integrated’s MAX78000 AI microcontroller.

Xailient’s neural network draws 250 times lower power (at just 280 microJoules) than conventional embedded solutions, and at 12 milliseconds per inference, the network performs in real time and is faster than the most efficient face-detection system available for the edge, claims Maxim.

Battery-powered AI systems that require face detection, such as home cameras, industrial grade smart security cameras and retail solutions, require a low power operation to provide the longest possible time between charges. In addition to supporting standalone applications, Maxim Integrated’s microcontroller paired with Xailient’s neural network improves overall power efficiency and battery life of hybrid edge / cloud applications that use a low power ‘listening’ mode which wakes up the more complex systems when a face is detected.

Xailient’s Detectum neural network includes focus, zoom and visual wake word technologies to detect and localise faces in video and images at 76 times faster rates than conventional software, at similar or better accuracy, says Maxim. The ability to localise a face means that it can be used for advanced applications which determine where a face is in the image’s field of view. Examples include person, vehicle and object counting, presence or obstruction detection, as well as path mapping and footfall heatmaps.

The network can be extended to other applications such as livestock inventory and monitoring, parking spot occupancy and retail or warehouse inventory levels.

Xailient’s neural network combined with the computational efficiency and low power sleep modes of the MAX78000 microcontroller extend the operating time of coin cell battery-powered, hybrid edge/cloud applications for many years, says Maxim.

“AI is on track to be the second largest carbon emitting industry,” said Dr. Shivy Yohanandan, Xailient chief technology office (CTO) and inventor of Xailient’s Detectum neural network technology. “Replacing 14 legacy internet protocol cameras that use traditional cloud AI with edge-based cameras equipped with the Maxim Integrated MAX78000 paired with Xailient’s neural network has the equivalent carbon impact of taking one gasoline powered car off the road,” he said.

The MAX78000 is available now and Maxim also offers the MAX78000EVKIT# evaluation kit.

The Detectum neural network, series models, tools, services as well as focus, zoom and visual wake word technologies are available directly from Xailient.

http://www.maximintegrated.com

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Developer kit accelerates AI vision

Microchip unveils single chip for network synchronisation

Xtensa processors meet ISO 26262 compliance to ASIL-D

Neural network detects faces in 12milliseconds

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