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Avnet Silica broadens IoT with LoRaWAN gateways from Miromico

Fri, Feb 18, 2022

Secure and robust LoRaWAN networking gateways from Miromico meet the needs of wide selection of IoT applications, says Avnet Silica. The distributor offers the Microsoft Azure Sphere-enabled gateways that can be used in IoT for retail, agricultural, smart buildings and smart cites.

Microsoft Azure Sphere enables the monitoring, tracking and management of data in almost every environment from buildings to factories, in hospitals, in agricultural and retail applications and in smart cities. Integrating the platform from qiio, the Miromico gateways support cellular, Wi-Fi and Ethernet connectivity and are also claimed to provide easy deployment and automatic management.

The LoRaWAN RF communications technology enables devices scattered across large areas to wirelessly connect to the internet, to enable organisations to deploy IoT solutions at a much lower cost than can be achieved via existing cellular infrastructure, said Miromico. For example, they can be used for monitoring weather or tracking sensors, asset management, controlled automation and climate control.

According to Avnet Silica, the Azure Sphere platform ensures safety from the risk of cyber-attacks by providing multiple layers of security to help guard the gateways against threats. It can also be deployed in a flexible way to secure existing equipment as well as building protection into new IoT infrastructure development. In addition, error reporting and automatic security update services help users stay ahead of current and evolving threats.

The platform also provides guaranteed maintenance for the gateways throughout their operating lifetime, automatically handling security maintenance tasks, such as the daily authentication of hardware and software. Close integration between the platform and the Miromico gateway hardware enables a failsafe mechanism for over the air (OTA) updates, continued the company, allowing customers to remotely upgrade gateways without fear of them becoming unreachable due to a glitch during the update.

Avnet Silica is the European semiconductor specialist division of Avnet and acts as the smart connection between customers and suppliers. The distributor simplifies complexity by providing creative solutions, technology and logistics support. Avnet Silica is a partner of leading semiconductor manufacturers and has a team of more than 200 application engineers and technical specialists to support projects from the idea stage, to the concept, to production. Avnet Silica is a regional business unit of Avnet, with European headquarters in Belgium.

http://www.avnet-silica.com

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UP Bridge the Gap hardware is compatible with Hailo-8 AI chips

Thu, Feb 17, 2022

AI chipmaker, Hailo has partnered with AI edge hardware manufacturer, Aaeon, to ensure that its latest UP Bridge the Gap branded hardware is compatible with the Hailo-8 M.2 AI acceleration module, to provide power efficient AI at the edge.

Edge computing requires increasingly intensive workloads for computer vision and other AI tasks, making it increasingly important to move deep learning workloads from the cloud to the edge. Running AI applications at the edge ensures real-time inferencing, data privacy, and low latency for applications across various markets, such as smart cities, smart retail and industry 4.0, said Aaeon.

UP Bridge the Gap edge modules pair the latest Intel processors with the Hailo-8 AI module to increase on-device inference and execution speed of AI models. Reallocating the computing resource of AI-based tasks from the CPU/GPU to the Hailo-8 neural processing unit (NPU) provides greater flexibility and possibilities for edge computing applications.

The Hailo-8 M.2 AI Module delivers 26T operations per second (TOPS) at what is claimed to be a record-breaking average rate of 2.5W. As a result, developers can run sophisticated deep learning and computer vision applications at the edge while keeping power consumption at a minimum.

The hardware which is compatible with the Hailo module includes the UP Squared Pro, which is based on the Intel Atom E3900 series (formerly Apollo Lake). According to Aaeon, it provides developers with power-efficient performance on a cost-effective device. The processors can reach speeds up to 2.5GHz. UP Squared Pro supports up to 8Gbbyte of LPDDR4 memory and offers up to 64Gbyte eMMC storage.

The UP Squared 6000 has the same compact form factor as the UP Squared Pro and is based on the latest Intel Atom x6000E series (formerly Elkhart Lake). The power-efficient platform offers up to 1.7 times better compute performance and twice the performance for 3D graphics as UP Squared Pro. It has a range of processor options to reach speeds from 1.90 to 3.0GHz. It is available with up to 8Gbyte of LPDDR4 memory and up to 64Gbyte eMMC storage.

There is also the UP Xtreme i11, featuring the 11th Generation Intel Core Processors (formerly Tiger Lake). It can clock up to 4.4GHz with only 28W TDP and 15W cTDP. It supports up to 64Gbyte with two slots for DDR4 SO-DIMM and offers a slot for a SATA III disk or NVMe disk.

The Hailo-8 M.2 AI Acceleration Module is now available for purchase as an add-on with these three modules.

“This partnership with Hailo benefits our clients even further with their growing demand for AI applications that run quickly and efficiently at the edge,” said Owen Wei, business development manager at Aaeon. “Hailo helps us bolster our offering while enabling a future powered at the edge,” he said.

http://www.aaeon.com

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Optiga TPM future-proofs security with PQC-protected firmware update

Wed, Feb 16, 2022

Addressing the challenges of quantum computing, namely cybersecurity, specifically on the confidentiality of encrypted data and on the integrity of digital signatures, Infineon Technologies has developed the Optiga TPM (trusted platform module) SLB 9672. It says it is a future-proof security solution with a post-quantum cryptography (PQC) protected firmware update mechanism using XMSS signatures.

The PQC mechanism counteracts the threat of firmware corruption by attackers with access to quantum computers and increases long term survivability of the device by enabling a quantum-resistant firmware upgrade path. The standardised TPM provides a foundation for securely establishing the identity and software status of PCs, servers and connected devices, and for protecting the integrity and confidentiality of data at rest and in transit.

Infineon’s latest member of the Optiga TPM family is also claimed to be the industry’s first TPM to offer a firmware update mechanism with a 256-bits key length, along with an additional check based on PQC. This mechanism allows the Optiga TPM SLB 9672 to still be updated even if the standard algorithms are no longer trusted. The design is engineered for improved computing performance and to counteract the effects of corrupted firmware. For example, built-in, fail-safe features enable TPM firmware recovery in accordance with the NIST SP 800-193 Platform Firmware Resiliency Guidelines.

The TPM also provides an expanded non-volatile memory to store new features such as additional certificates and cryptographic keys. Security evaluation and certification are performed by independent bodies according to the Common Criteria and FIPS requirements. The TPM also fully complies with the Trusted Computing Group (TCG) requirements (TPM 2.0 standard version 1.59) and is certified according to the latest TPM 2.0 standard.

The standardised trust base is accompanied by tools to support design activities (e.g., software and demo boards), this TPM enables easy integration with host software. It also supports the latest versions of Windows and Linux.

The chip has an extended temperature range of -40 to +105 degrees C.

Infineon is committed to the long-term availability of Optiga TPM SLB 9672 for a minimum of 10 years and offers tailored support and maintenance through the Infineon Security Partner Network (ISPN).

The Optiga TPM SLB 9672 is available to order now.

http://www.infineon.com

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Tektronix claims industry first with PCI Express 6.0 test

Wed, Feb 16, 2022

Customers can transition to PCIe 6.0 PAM4 signalling, just weeks after the PCI-SIG (Special Interest Group) released PCI Express (PCIe) 6.0 Base specifications and validation requirements, said Tektronix at the release of the PCIe 6.0 Base transmitter test for oscilloscopes.

PCIe 6.0 is a scalable standard for data-intensive markets such as data centre, artificial intelligence / machine learning (AI / ML) and high performance computing (HPC). It transitions to PAM4 signalling and new error correcting techniques. The Tektronix test therefore includes PCIe 6.0 measurement-specific software, enhanced PAM4 DSP capabilities and noise compensation on the oscilloscope. The Tektronix test is further enhanced by the analysis tools for SNDR and uncorrelated jitter measurements which are both mandated requirements for the PCIe 6.0 standard.

The PCIe 6.0 standard transmitter validation for high performance and data-intensive markets is available worldwide for use with DPO70000SX ATI Performance Oscilloscopes.

Tektronix’s customer, silicon IP provider, Alphawave collaborated with Tektronix for early validation of PCIe 6.0 physical layer designs. “Tektronix was deeply involved in defining the PCIe 64 GT/s measurement methodologies, which enabled our engineers to increase their confidence in meeting this challenging new standard prior to release,” said Clint Walker, vice president of marketing at Alphawave.

Tektronix’s Swapnil Mane, marketing director of wired solutions, agreed: “Our PCIe 6.0 standard test and debug solution easily integrates into the engineers’ workflow for test and debug. With the complexity of PAM4 signalling, our analysis tools make it easier to test their design and ensure it meets the new 6.0 standard requirement with a high degree of confidence”.

The test includes PCIe 6.0 (64 GT/s) standard automated base transmitter running on Tektronix DPO70000SX real time oscilloscopes with 50GHz and above bandwidth. It has enhanced PAM4 DSP capabilities with the Tektronix PAMJET application and support for measurements developed for the PCI Express 6.0 standard including SNDR, RLM, uncorrelated jitter, and pulse width jitter. In addition, instrumentation noise compensation techniques are tailored to individual measurements to achieve the most accurate results, said Tektronix.

http://www.tek.com

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Avnet Silica broadens IoT with LoRaWAN gateways from Miromico

UP Bridge the Gap hardware is compatible with Hailo-8 AI chips

Optiga TPM future-proofs security with PQC-protected firmware update

Tektronix claims industry first with PCI Express 6.0 test

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