Advantech unveils its first Open Standard Module S Size

Industrial embedded company, Advantech has released the ROM-2620, its first Open Standard Module (OSM) designed to revolutionise AIoT applications with its low power consumption and small size.

The ROM-2620 is based on the Open Standard Module (OSM) Size-S form factor specified by the Standardization Group for Embedded Technologies (SGET). It incorporates NXP Semiconductors’ i.MX 8ULP applications processor with integrated EdgeLock secure enclave. According to Advantech, this combination offers modular embedded computing that is cost-effective, compact, and power-efficient at the intelligent edge.
The NXP i.MX 8ULP applications processor features two Arm Cortex-A35 cores for powerful processing, an Arm Cortex-M33 core for real-time response and a Cadence Tensilica Hifi 4 DSP and Fusion DSP for efficient edge AI / ML processing and acceleration. The processor is built using advanced 28nm FD-SOI process technology and NXP’s Energy Flex architecture. The i.MX 8ULP enables exceptional power efficiency in both static and dynamic modes. The Cortex-M33 reduces static power down to 36 microWatts for applications requiring extended battery life. The Cortex-A35 delivers a 40 per cent performance improvement from 32bit to 64bit at just 1.62W for main operation load. The NXP i.MX 8ULP device also offers 3D/2D GPUs and four-lane MIPI DSI parallel display interfaces to cater to industrial HMI graphics needs. Additionally, UART, GPIO, I2C, FlexCAN, and fast Ethernet interfaces enable edge data collection, control, and transmission.

The ROM-2620 adopts the standard OSM size-S form factor (30 x 30mm) with 332 pinouts to meet the growing space requirements of IoT applications. The LGA surface mount package is resilient to vibration, shock and other mechanical stressors, said Advantech, making it suitable for IoT edge nodes operating in harsh industrial environments.

To future-proof the OSM form factor, Advantech provides full support throughout the design-in process and volume production, to product lifecycle management. It also offers design references, hardware documentation and manufacturing guidelines, for example stencil design suggestion and IR reflow diagram, with practical tips and information to ensure project success and minimize time-to-market.

Integrating NXP’s High Assurance Boot (HAB) technology into Advantech’s AIM-Linux software service simplifies the establishment of secure systems, said the company. This ensures that only software images signed by developers can be executed on the SOC. By leveraging the NXP EdgeLock secure enclave integrated into the i.MX 8ULP as a built-in security subsystem, ROM-2620 provides a silicon root of trust and robust security architecture, protecting edge devices against physical and network attacks.

The low power, miniature ROM-2620 OSM is now available for sample purchase.
http://www.advantech.com

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SoM and starter kit accelerate development for motor control and DSP applications 

Additions to the Kria portfolio of adaptive system on module (SoM) and developer kits have been announced by AMD. The Kria K24 SoM and KD240 Drives starter kit are available to order now.

The Kria K24 SoM offers power-efficient compute in a small form factor and targets cost-sensitive industrial and commercial edge applications, explained the company. InFO (integrated fan-out) packaging results in the K24 being half the size of a credit card while using half the power of the larger, connector-compatible Kria K26 SoM. 

It provides high determinism and low latency for powering electric drives and motor controllers used in compute-intensive DSP applications at the edge, such as electric motor systems, robotics for factory automation, power generation, public transportation such as elevators/lifts and trains, surgical robotics and medical equipment such as MRI beds, and also EV charging stations. 

The KD240 Drives starter kit is a motor control-based development platform. Coupled with the 24 SoM, users can quickly develop motor control and DSP applications at a reduced time to market and without requiring FPGA programming expertise. 

The K24 SoM features a custom-built Zynq UltraScale+ MPSoC device and the supporting KD240 starter kit is a sub-$400 FPGA-based motor control kit. Enabling developers to begin at a more evolved point in the design cycle, the KD240 provides easy access for entry-level developers compared to other processor-based control kits.

The K24 SOM is qualified for use in industrial environments with support for more design flows than any generation before it, said AMD. That includes familiar design tools like Matlab Simulink and languages like Python with its extensive ecosystem support for the PYNQ framework. Ubuntu and Docker are also supported. Software developers can also use the AMD Vitis motor control libraries while maintaining support for traditional development flows.

“The K24 SOM delivers high performance-per-watt in a small form factor and houses the core components of an embedded processing system on a single production-ready board for a fast time to market,” said Hanneke Krekels, corporate vice president, Core Vertical Markets, AMD. 

It is estimated that around 70 per cent  of the total global electrical use by the industrial sector is tied to electric motors and motor-driven systems. AMD said that even a one per cent improvement in the efficiency of a drive system can have a significant positive impact on operational expenses and the environment. 

The KD240 is supported by an optional motor accessory pack (MACCP), with additional motor kits available in the future that can be purchased separately for an enhanced ramp-up experience for developers. 

K24 SOMs are offered in both commercial and industrial versions and are built for 10-year industrial lifecycles. In addition to support for expanded temperature ranges, the industrial-grade SoM includes ECC-protected LPDDR4 memory for high-reliability systems. 

The K24 commercial version is shipping today, and the industrial version is expected to ship in Q4.   

https://www.amd.com

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System on module is designed for streaming media applications

iWave has introduced the i.MX 8QuadMax / QuadPlus SoM (system on module) to support designers by offloading several complexities involved in the design cycle, said the company. the i.MX 8 SoM for streaming media applications is based on the i.MX 8 family of applications processors which supports advanced media processing, secure domain partitioning, and vision processing. These characteristics make the processor suitable for applications such as automotive infotainment, advanced industrial human machine interface (HMI) as well as control and home automation.

According to iWave, the i.MX 8 series allows for multiple systems to be combined into one with ease and for diverse platforms to be built with multiple operating systems on a single i.MX 8 processor.

It also allows for the creation of independent GPU displays and functionalities by partitioning the resources and enables end to end security to be implemented. The processor series also allows for multi-display and multi-domain functionality. It is possible to develop up to four 1080p screens with independent content, said iWave.

There is also dual-core Cortex-M4F for offloading real-time tasks and a scalable platform to enable seamless machine interfaces. Another feature is the multi-domain voice recognition and audio processing.

As processing capabilities increase, so do the complexity and scope of developing embedded systems. The i.MX 8QuadMax / QuadPlus SoM combines high-performance computing at low power, said iWave. It offers single, dual, or quad-core Cortex-A53 cores running at up to 1.2GHz and a dual Cortex-A72 core running up to 1.6GHz. There is also heterogeneous multi-core processing with the Cortex-M4F running at up to 264MHZ for advanced system control.

Other features include up to 4Kp60 H.265 video decoding, up to 4Kp30 H.264 decode capable VPU and 1080p30 H.264 encode capable VPU. The SoM also boasts a 3D graphics processing unit, enhanced vision capabilities via a graphics processor and pro audio fidelity levels using the SAI/I2S audio interface.

The SoM supports a variety of high speed interfaces, including Gigabit Ethernet, USB3.0, SATA3.0 and multiple GPIO, high-speed PCIe v3.0 interface support and an  HDMI2.0 display (up to 4K), LVDS, MIPI-DSI (up to four lanes) and 720p at 60 frames per second.

Security features include secure boot, secure storage, Wi-Fi security and OPTEE. Operating systems supported are Linux 5.10.52, Ubuntu 20.04 LTS, Android Pie 11.0.0 and QNX 7.0.0 (or higher).

The i.MX 8 SoM is also supplied with integrated u-Blox JODY-W3 making it compatible to support Wi-Fi 6 (802.11ax) and Bluetooth 5.1.

Each Wi-Fi 6 access point provides a significant speed boost, said iWave, as well as 50 per cent increase in battery life, a four-fold increase in network capacity and a two-fold increase in bandwidth over previous generations of Wi-Fi.

https://www.iwavesystems.com 

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Cadence-Arm collaboration pushes Neoverse V2 verification

Cadence Design Systems has collaborated with Arm for its Neoverse V2 by fine-tuning its AI-driven RTL-to-GDS digital flow for Neoverse V2 and delivered corresponding 5nm and 3nm Rapid Adoption Kits (RAKs) which are designed to support customers achieve power, performance and area (PPA) targets faster. The Cadence AI-driven verification full flow supports Neoverse V2, providing designers with optimal verification throughput and preparedness for Arm SystemReady compliance, added Cadence.
The AI-driven Cadence RTL-to-GDS digital full flow RAKs for 3nm and 5nm nodes include Genus Synthesis, Modus DFT Software, Innovus Implementation System, Quantus Extraction, Tempus Timing and ECO Option, Voltus IC Power Integrity, Conformal Equivalence Checking, Conformal Low Power and the AI-based Cerebrus Intelligent Chip Explorer.
Benefits of the digital RAKs for Arm Neoverse V2 designers include, for example, the  Cerebrus AI capabilities which automate and scale digital chip design, delivering better PPA and improving designer productivity. The inclusion of Cadence iSpatial technology provides an integrated and predictable implementation flow for the faster design closure, added the company. The RAKs also include a smart hierarchy flow that delivers optimal turnaround times on large, high-performance CPUs.
In another example, the Tempus ECO technology offers sign off-accurate final design closure based on path-based analysis. The incorporation of the GigaOpt activity-aware power optimisation engine is claimed to significantly reduce dynamic power consumption.
The AI-driven verification full flow is optimised to support Arm Neoverse V2 and includes the Xcelium Logic Simulation platform, Palladium Enterprise Emulation platforms, Protium Enterprise Prototyping systems, Helium Virtual and Hybrid Studio, Jasper Formal Verification platform, Verisium Manager Planning and Coverage Closure tools, Perspec System Verifier, and VIP and System VIP tools and content for Arm-based designs.
The verification full flow provides Neoverse V2 designers with pre-silicon server base system architecture (SBSA) compliance verification and optimised PCI Express (PCIe) integration while the Helium Virtual and Hybrid Studio includes editable virtual and hybrid platform reference designs for Neoverse V2. These designs incorporate Arm Fast Models to jumpstart early software development and verification. The Helium gearshift technology enables customers to position workloads in a high-performance hybrid environment before shifting to a fully accurate RTL environment, offering detailed verification using either the Palladium or Protium platforms.
“The growing demand for complex workloads such as big data analytics, HPC and ML inference requires specialised compute solutions that achieve greater performance and efficiency,” said Eddie Ramirez, vice president of go-to-market, infrastructure line of business at Arm. “Through this latest collaboration, customers can leverage Cadence’s comprehensive digital and verification flows to validate their solutions and bring the power of their Neoverse V2-based products to market faster. Furthermore, silicon partners will get the benefits of these advanced design flows when running their EDA workloads on Arm-enabled servers and cloud instances.”

http://www.cadence.com

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