i.MX 93 applications processor enhances security at the edge, says NXP

Believed to be the industry’s first implementation of the Arm Ethos-U65 microNPU, the i.MX 93 applications processors are the first in NXP’s i.MX 9 series.

The applications processors are designed for automotive, smart home, smart building and smart factory applications, which use edge machine learning to anticipate user needs. They combine the Arm Ethos-U65 microNPU with a high level of security and integration to deliver efficient, fast, secure machine learning at the edge, for example in voice-assisted smart home and building systems. They can also be used in low power industrial gateways and automotive driver monitoring systems. 

The i.MX 93 family has a heterogenous multi-core architecture, including up to two 1.7GHz Arm Cortex-A55 applications processors and a real-time Cortex-M33 microcontroller subsystem with access to all SoC peripherals, including the 256 MACs / cycles Arm Ethos-U65 microNPU. This architecture delivers power-efficient machine learning across a variety of applications, including compact, battery-powered IoT devices, says NXP. 

The i.MX 93 family supports a variety of industrial and automotive connectivity interface protocols, in addition to broad multi-media interfaces. This also reduces the need for external hardware components and additional design work, to reduce the time to market as well as overall systems costs. 

Ron Martino, executive vice president and general manager, ege processing for NXP Semiconductors, believes: “The highly integrated i.MX 93 applications processors will help open an entirely new range of use cases at the edge, where you need to have that close tie-in to the sensor data to make fast decisions. This will enable a new generation of secured, efficient, intelligent devices across IoT, industrial IoT and automotive applications.”

NXP’s EdgeLock secure enclave is a standard on-die feature across the i.MX 9 series. It is a pre-configured, self-managed and autonomous security subsystem. It is particularly useful for developers without deep security expertise.

“We’re making it easier for developers to create, connect, and maintain innovative IoT devices by providing a comprehensive platform actively supported by the scale and expertise of Microsoft software, cloud and security experts,” said Halina McMaster, partner group program manager, Microsoft Azure Sphere. “Together with NXP, we are delivering a variety of Microsoft Azure Sphere-certified edge processors that provide a secured environment for customer applications, critical over-the-air update infrastructure, and more than 10 years of ongoing security improvements for every Azure Sphere chip,” she said. 

i.MX 93-CS processors with Azure Sphere are built with Microsoft Pluton enabled on the EdgeLock secure enclave. Pluton on EdgeLock secure enclave is the dependable hardware root of trust which is built into the silicon and enables the Azure Sphere security stack.

Machine learning application development on the i.MX 93 family will be enabled by the eIQ software development environment, including the eIQ Toolkit workflow tools, the GUI-based eIQ Portal development environment and eIQ inference engine options that will include the Arm Ethos-U65 microNPU as an inference target. 

The i.MX 93 applications processors implement NXP’s innovative Energy Flex architecture, enabling developers to optimize energy usage for each operating mode to create portable devices with longer battery life. 

http://www.nxp.com

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Cross-domain automotive control microcontrollers enhance ECU integration

Microcontrollers designed to address the growing need to integrate multiple applications into a single chip and unify the electronic control unit (ECU) in vehicles, make up the RH850/U2B series.

Renesas says the cross-domain microcontrollers are built for the rigorous workloads required by vehicle motion in hybrid ICE and xEV traction inverter, high-end zone control, connected gateway and domain control applications. 

They join the company’s RH850/U2A microcontrollers for body and chassis control systems. Customers can also combine the microcontrollers with Renesas’ R-Car S4 SoC devices for automotive central gateway systems for scalable electronic / electrical architectures that are deemed the architectures for future vehicle generations. 

Naoki Yoshida, vice president, automotive digital products marketing division at Renesas, said: “The RH850/U2B microcontrollers . . . performance, memory integration and hardware-based support for new zone- and domain-control applications, particularly for powertrain and HEV/EV, while maintaining the stringent cost, safety, and security parameters required for these automotive systems”.

Designed for zone and domain applications, the 28nm RH850/U2B microcontrollers build on key functions from Renesas’ RH850/E2x series for powertrain and RH850/C1M-Ax series for HEV/EV motor control. At the same time they add enhancements including an accelerator IP, higher performance levels and increased security. This feature set enables users to integrate multiple ECU functions into a single ECU while adhering to stringent automotive-grade safety, security and real-time operation requirements.

The integrated hypervisor hardware-based virtualisation assist function allows multiple software systems with up to ISO26262 ASIL D functional safety levels to operate independently, without interference. It also reduces the virtualisation overhead to maintain real-time execution. Quality-of-service (QoS) provides a latency monitor and regulation function for all bus masters to ensure minimum bandwidth is always available. The RH850/U2B microcontrollers support safe and rapid full no-wait over the air (OTA) software updates with dual-bank embedded flash that allows the ECU to update and save images while the microcontrollers are in active mode and enables the ECU to operate from the original code if a failure occurs. Integrated motor control accelerator IP (EMU3S) works in conjunction with multiple dedicated motor control timer structures like GTM v4.1 and TSG3 to reduce CPU processing loads while achieving high-speed rotation. Dedicated data flow processor (DFP) accelerator IP enables the CPU to offload compute-heavy operations for complex control. 

The microcontrollers have up to eight 400MHz performance cores with four of them in lockstep architecture, with built-in flash targeting ASIL-D and ASIL-B applications. Integrated security functions support the Evita Full standard, including elliptic curve cryptography. There are multiple instances of AES128 lock-step modules for conflict-free, deterministic safe and secure communication.

The dedicated resolver / digital converter accelerator IP (RDC3X) processes analogue signals from a motor rotational angle sensor (resolver) or an inductive position sensor. 

The DR1000C is a RISC-V-based parallel co-processor IP with vector extension (DFP), licensed from NSITEXE, which supports the fast execution of complex mathematical algorithms.

Communication interfaces include Gigabit Ethernet TSN with switch support. 

The RH850/U2B microcontrollers will be sampling from April 2022. 

http://www.renesas.com

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Allegro unveils three-phase gate driver for EV and hybrid cars 

From Allegro MicroSystems comes the QuietMotion product line with the introduction of the A89307 automotive-qualified gate driver integrated circuit.

Designed for battery cooling fans and HVAC systems in electric and hybrid vehicles, the A89307 offers low noise and vibration by using a field orientated control algorithm to drive continuous sinusoidal current to the load. This helps car manufacturers reduce noise and improve battery life, offering more miles per charge and lowering vehicle carbon footprints, says Allegro.

“By design, EV and hybrid vehicles are quieter than traditional models with internal combustion engines – especially when they’re stopped – and drivers are becoming increasingly sensitive to noise created by components such as cooling fans,” said Steve Lutz, product line director for Motor Drivers at Allegro. “The A89307’s hardware-based algorithm makes it easier for designers to reduce fan noise while improving cooling performance and increasing miles per charge. That’s good for drivers and good for the environment.”

The A89307 includes a hardware-based algorithm, which requires no external sensors or software development; the user selects parameters using a GUI interface and loads them into the IC’s on-chip EEPROM. With only five external components, the A89307 helps designers lower material costs by reducing BOM components and facilitating very small system footprints for in-motor PCBs. Its fully integrated algorithm can even eliminate the need for a separate microprocessor. 

Modes of operation include open-loop PWM or fully programmable closed-loop speed control. In closed-loop mode, the customer can program the PWM-to-speed relationship to match the PWM commands provided by an external ECU. Field weakening is included to improve performance at high speed. Low-speed operation and windmilling start-up are just a few of the features included in the A89307 hardware based digital algorithm. 

While designed for xEV battery cooling fans, the A89307 can also be used in HVAC blowers as well as liquid pumps in traction inverter cooling systems. The external gate drive allows the device to be flexible enough to drive a wide range of motor powers up to 500W. 

http://www.allegromicro.com 

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Automotive wireless charging reference design is Qi 1.3-certified

Believed to be the first automotive wireless charging reference design to be certified by the Wireless Power Consortium for the new Qi 1.3 standard, NXP  has released the Automotive 15W Wireless Charging Transmitter reference design.

It consists of a Qi-certified board with an NXP wireless charging MWCT microcontroller, as well as optional NFC, secure element and CAN / LIN transceiver. It also features a software package with NXP’s wireless charging Qi 1.3 software library and a suite of customisable software design to make it easier for developers to bring a Qi-certified wireless charger to market.

The Wireless Power Consortium’s Qi standard is used by most major smartphone manufacturers, including Apple, Samsung and Xiaomi. The Qi 1.3 standard includes new secure authentication features that verify if a smartphone or other wireless power device is Qi-certified and can reduce the wireless power transfer to lower levels if an uncertified device is detected. This ensures user safety and protects equipment from damage. It does, however, requires the addition of secure storage to the wireless power transmitter, addressed by NXP’s automotive-grade products.

Customers can use customise the wireless charging software library, based on the type of wireless charging application targeted. Design options include scaling designs from 5.0 to 15W and above with proprietary protocols, single or multi-coil chargers and across vehicles fleets.

NXP released pre-production details of the WCT-15WAUTO13 multi-coil transmitter reference platform, the first Qi 1.3-certified 15W reference design for in-vehicle wireless charging applications based on the NXP MWCT2xx3A controller IC family.

The system supports 40W power delivery to meet all customised fast charging requirements. It uses automotive-grade components and other automotive functions including EMC optimisation, safety features and MISRA C compliance software. It complies with the Wireless Power Consortium’s Qi v1.3 specification including authentication and is certified as an MP-A13 transmitter type.

http://www.NXP.com

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