Automotive

Second generation radar transceivers from NXP are now available for ADAS (advanced driver assistance systems) and AD (autonomous driving). The TEF82xx series of 77GHz RFCMOS radar transceivers is optimised for fast chirp modulation, and supports short-, medium- and long-range radar applications, including cascaded high-resolution imaging radar. 

It enables 360 degree sensing for critical safety applications, including automated emergency braking, adaptive cruise control, blind-spot monitoring, cross-traffic alert and automated parking.

Radar is used for sensing in passenger vehicles’ ADAS but also in MaaS (mobility as a service) applications, says NXP. Fully autonomous driving will demand higher RF performance for distances beyond 300m, as well as at finer resolutions down to sub-degree level to accurately detect, separate and classify smaller objects. Used with NXP’s scalable family of S32R radar processors, NXP said the TEF82xx RFCMOS radar transceivers are able to deliver the fine angular resolution, processing power, and ranges, required for production-ready imaging radar solutions.

The RFCMOS transceivers have three transmitters, four receivers, ADC conversion, phase rotator and low phase noise VCOs (voltage controlled oscillators). It also includes built-in safety monitors and external interface capability for MIPI-CSI2 and LVDS and complies with ISO26262 and ASIL Level B standards.

NXP has doubled RF performance compared with the first generation devices, with improvements such as a +6dB phase noise improvement, output power of 14dBm at phase noise of -95dBc/Hz and a receiver noise figure of 11.5dB. TEF82xx transceivers use a compact eWLB package with exposed die, which optimises heat transfer to meet demanding thermal conditions, even at elevated ambient temperatures. A particularly short chirp return time of just four microseconds reduces power on time to reduce sensor power consumption. It also allows chirps to be spaced more closely in time which increases speed estimation capabilities.

Developers can easily build and optimise applications using the radar algorithm library offered by the automotive-grade radar software development kit (RSDK) without having to spend time manually fine-tuning accelerator software. There is also a large ecosystem of compilers, development environments, MCALs, and both free and commercial RTOS support.

http://www.nxp.com

To support developers’ work to automate and connect end applications, Microchip has introduced the PIC32CM JH microcontroller. The 512kbyte flash, 5.0V, Dual CAN FD device delivers features typically only available on more expensive, higher performance devices, said Microchip. 

Automation and connectivity rely on industry standards related to functional safety and cybersecurity protection to ensure products operate safely and securely. To provide manufacturers with an MCU equipped with components that meet ISO 26262 functional safety and ISO/SAE 21434 cybersecurity engineering standards, the PIC32CM JH is the industry’s first MCU-based on the Arm Cortex-M0+ architecture with AutoSAR support, memory built-in self test (MBIST) and secure boot.

The PIC32CM JH is compatible with AutoSAR, an open software architecture, providing suppliers with the ability to change to lower-level hardware while keeping the original application code for ease of migration. AutoSAR-ready is designed to streamline the development process and reduce overall costs. When using AutoSAR, Microchip offers ASIL B microcontroller abstraction layers (MCALs) for functional safety applications, providing the lower-level hardware interface to the MCU. 

Automotive industry OEMs require both functional safety and cybersecurity protection for many in-vehicle applications including touch buttons and touch wheels, door controls and console controls, and body applications such as advanced driver assistance systems (ADAS). Pairing the PIC32CM JH with one of Microchip’s Trust Anchor TA100 CryptoAutomotive security ICs, complies to ISO/SAE 21434, the new Cybersecurity standard for automotive. The TA100 employs secure hardware-based cryptographic key storage and cryptographic counter measures to eliminate potential back doors linked to software weaknesses. 

Rod Drake vice president of Microchip Technology’s 32-bit MCU business unit, commented: “OEMs and other manufacturers now have the option to use an entry-level Arm Cortex-M0+ based MCU to meet compliance requirements previously only available on higher-end MCUs.”

The secure boot authenticates the code and prevents malicious code from being loaded onto the MCU. Other hardware features on the PIC32CM JH MCU are error correction code (ECC) with fault injection, loopbacks on the communications interfaces, system memory protection unit and MBIST. 

MBIST is the industry standard method of testing embedded memories and can quickly test the integrity of the SRAM to ensure it is functioning properly before the code is run to mitigate failures. To support developers with implementation, the PIC32CM JH has a safety manual, failure modes effects and diagnostic analysis (FMEDA) and diagnostic code targeting to ISO 26262 ASIL B. 

The PIC32CM JH also includes advanced touch with Driven Shield Plus, for noise and water tolerant operation. This feature is necessary for home appliances, industrial and automotive applications requiring touch operation in harsh environments.

Microchip also provides the PIC32CM JH01 Curiosity Pro development kit (Part number EV81X90A) to support the PIC32CM JH MCU.

The PIC32CM JH MCU and EV81X90A are available now.

http://www.microchip.com