Optical gyroscope with GNSS/INS evaluation kit tracks autonomous vehicles

Tracking technology developed by Anello uses an on-chip waveguide manufacturing process, integrated with a patented silicon photonic IC to enable fibre optic gyro performance with a standard silicon manufacturing process.

The SIPHOG (Silicon Photonics Optical Gyroscope) is intended for the autonomous navigation market and Anello’s evaluation kit is expected to be used for mapping, surveying, robotics, construction, defence, aerospace and autonomous vehicle applications.

The SIPHOG’s principle of operation is the same as that of the classical interferometric fibre optic gyroscope where the phased modulated light is launched into a waveguide where the light experiences equal but opposite additional phase shifts during rotation. This additional phase shift, due to rotation, is known as the Sagnac effect. The return light from the waveguide is coupled into a photodetector, where the two return beams produce an interference signal that is linearly proportional to the angular rate.

Anello’s low loss on chip waveguide manufacturing process allows the “fibre” in a FOG to be directly replaced by the patented SIPHOG waveguide IC. The IC replaces the discrete optical components (couplers, modulators and detector) found in a FOG. The integrated SIPHOG therefore reduces component costs and dimensional volume compared to an equivalent high performance traditional fibre optic gyro (FOG) implementation.

 The manufacturing process is being developed at a large USA-based commercial semiconductor foundry.

Powered by Anello’s optical gyroscope and sensor fusion engine, the evaluation kit can maintain centimetre accuracy in conditions where more expensive ground-truth positioning and localisation systems degrade, said the company. The kit is also accurate in extended full GNSS loss operation. Unlike other positioning and localisation systems, the evaluation kit is more stable over wide temperature ranges and under extreme vibration, said Anello.

The kit has been designed to be easy to use while enabling seamless navigation and positioning in challenging GNSS-denied environments where accuracy is paramount.

Anello reported that it is currently engaged in trials with customers in the automotive, robotics, autonomy, construction, heavy vehicles, defence, aerospace, mapping and surveying markets.

Anello Photonics is based in Santa Clara, California, USA. It has developed an integrated photonic SoC technology for next generation navigation. Its SiPhOG gyroscope is based on its proprietary waveguide process that mimics the properties of optical fibre in an on-chip waveguide. 

http://www.anellophotonics.com

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ASIL positioning software engine pairs with TeseoAPP for precision in AVs

Point One Navigation’s FusionEngine software is ASIL-rated for precision location operations in autonomous vehicles (AVs).

When paired with STMicroelectronics TeseoAPP (Teseo ASIL Precise Positioning) GNSS chipset, it offers a competitively priced, production-ready positioning system for navigation and advanced driver assistance systems (ADAS), says Point One Navigation. It said that the combination assures functional safety at ASIL-B, a critical requirement for Level 3+ ADAS systems.

FusionEngine is built on the company’s proprietary self-calibrating, sensor fusion algorithms. It combines data from multiple sensors, including the TeseoAPP multi-band GNSS receiver for high accuracy.

It can be easily integrated into a variety of host processors that are used for enabling Level 3+ ADAS and autonomous driving systems.

The TeseoAPP receiver and the STA5365S external RF front end provides dual band precise raw measurement data for all visible GNSS satellites to the main host processor, where the FusionEngine is integrated. The TeseoAPP receiver and chipset comply with ST’s Automotive Grade qualification, including AEC-Q100 and ISO 26262.

The FusionEngine enables developers to complete the functional safety concept phase for the host system software integration. This includes the definition of safety goals, functional and technical safety requirements as well as the test methods to provide evidence of successful integration. These test methods are then fully executed and audited to achieve the assigned ASIL rating.

“Building on the foundation of ST’s TeseoAPP, we are enhancing safety in production automotive applications,” said Aaron Nathan, CEO at Point One Navigation. 

Tomorrow’s vehicles, equipment, and devices require continuous precise knowledge of their location to be safe and effective in the real world. Point One says it is delivering the first precise positioning solution that is both cost effective and works anywhere. Its location platform comprises satellite navigation, computer vision, and sensor fusion. It is claimed to outperform other options by tightly coupling the strengths of different sensor modalities and intelligently using proprietary data. 

Point One is headquartered in San Francisco, California, USA.

http://www.pointonenav.com 

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Renesas and Fixstars develop tool suite for R-Car SoC-based ADAS

Semiconductor provider, Renesas Electronics and multi-core CPU / GPU / FPGA acceleration technology company, Fixstars are jointly developing a suite of tools that allows optimisation and fast simulation of software for autonomous driving (AD) systems and advanced driver assistance systems (ADAS) specifically designed for the R-Car SoCs from Renesas. 

Today’s AD and ADAS applications use deep learning to achieve highly accurate object recognition. Deep learning inference processing requires massive amounts of data calculations and memory capacity. The models and executable programs on automotive applications must be optimised for an automotive SoC, because real time processing with limited arithmetic units and memory resources can be a challenging task, explained Renesas. The process from software evaluation to verification must be accelerated and updates need to be applied repeatedly to improve the accuracy and performance. 

The tools will make it possible to rapidly develop network models with accurate object recognition from the initial stage of software development and take advantage of the performance of the R-Car SoC, said Renesas. The intention is to reduce post-development rework in order to shorten development cycles. 

The first tool is the R-Car Neural Architecture Search (NAS) tool for generating network models optimised for the SoC. This tool generates deep learning network models that efficiently use the CNN (convolutional neural network) accelerator, DSP, and memory on the R-Car. Engineers can develop lightweight network models that achieve highly accurate object recognition and fast processing time even without a deep knowledge or experience with the R-Car architecture, said Renesas.

Another tool is the R-Car DNN compiler for compiling network models for R-Car

It converts optimised network models into programs that can make full use of the performance potential of R-Car. It converts network models into programs that can run quickly on the CNN IP and also performs memory optimisation to enable high-speed, limited-capacity SRAM to maximise its performance.

Finally, there is the R-Car DNN simulator for fast simulation of compiled programs. It can be used to rapidly verify the operation of programs on a PC, rather than on the R-Car chip. Developers can generate the same operation results that would be produced by R-Car, said Renesas. If the recognition accuracy of inference processing is impacted during the process of making models more lightweight and optimising programs, engineers can provide immediate feedback to model development, therefore shortening development cycles.

“Renesas continues to create integrated development environments that enable customers to adopt the “software-first” approach,” said Hirofumi Kawaguchi, Vice President of the Automotive Software Development division at Renesas. “By supporting the development of deep learning models tailored to R-Car, we help our customers build AD and ADAS solutions, while also reducing the time to market and development costs.”

Genesis for R-Car is a cloud-based evaluation environment which allows engineers to evaluate and select devices earlier in the development cycles. Satoshi Miki, CEO of Fixstars, confirmed: “We will continue to develop new technologies to accelerate machine learning operations (MLOps) that can be used to maintain the latest versions of software in automotive applications.”

The partners also announced the joint Automotive SW Platform Lab, where Renesas and Fixstars will continue to develop software for deep learning and build operation environments that maintain and improve recognition accuracy and continuously updating network models.  

The first set of tools available today is designed for the R-Car V4H SoC.

https://www.renesas.com

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Ventana launches RISC-V CPU for data centres at RISC-V Summit

At this week’s RISC-V Summit in San Jose, California, Ventana Micro Systems introduced Veyron V1. The data centre class RISC-V CPU runs at 3.6GHz and will be offered in the form of high performance chiplets and IP. 

The Veyron V1 is the first RISC-V processor to provide single thread performance that is competitive with the latest incumbent processors for data centre, automotive, 5G, AI and client applications, claimed Ventana Micro Systems. Its efficient microarchitecture also enables the highest single socket performance among competing architectures, said the company.

The efficient performance of the Veyron, combined with RISC-V’s open and extensible architecture optimises the workload for efficiency gains which are enhanced further through domain specific acceleration that will extend Moore’s Law to deal with the emerging energy and thermal constraints for data centres, the company said.

The standards-based Veyron V1 compute chiplet and reference platform are claimed to accelerate time to market by up to two years and reduce development costs by up to 75 per cent. Chiplet based solutions provide flexibility and are economical by right sizing compute, IO and memory while composable architectures leveraging chiplets allow companies to focus on innovation. 

Ventana provides a software development kit (SDK) which includes an extensive set of software building blocks already proven on Ventana’s RISC-V platform.

The RISC-V CPU core is the centrepiece of the first compute chiplet solution with chiplets supplied by different companies. Ventana’s Veyron platform also enables integration of a flexible domain specific accelerator for hardware / software codesign. 

Veyron V1 will be available in the second half of 2023 and is the first in a series of products from Ventana.

“Ventana has a world class team with an average of twenty plus years of experience bringing multiple new CPU architectures to market,” said Patrick Moorhead, founder and chief analyst at Moor Insights & Strategy. “Ventana is the first big core in RISC-V to show up, the only game in town, and has a jump on the market.”

Key features include a 5nm process technology, 16 cores per cluster and a high core count multi-cluster scalability up to 128 cores. There is 48Mbyte of shared L3 cache per cluster, advanced side channel attack mitigation for cybersecurity and I/O memory management and advanced interrupt architecture (AIA) system IP.

https://www.ventanamicro.com/ 

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