For next-generation automotive architectures, Renesas Electronics has introduced a 28nm microcontroller with virtualisation-assisted functions. The 600MHz flash microcontroller combines enhanced built-in self-test (BIST) and a Gbit Ethernet (GbE) interface.
The company described the verification of the automotive test chip as a technological stepping stone toward the realisation of next-generation automotive-control flash microcontrollers employing a 28nm low power process.
The microcontroller has four 600MHz CPUs with a lock-step mechanism and a large flash memory capacity of 16Mbyte as well as virtualisation-assisted functions. This technology allows multiple software components to run on a single microcontroller without interfering with each other to satisfy the requirements of the highest automotive safety integrity level specified under the ISO 26262 functional safety standard for road vehicles, ASIL D.
The enhanced BIST functionality allows for microcontroller self-diagnostic fault-detection, which is necessary to implement ASIL D. The newly developed standby-resume BIST (SR-BIST) function is executed during the standby-resume period.
There is also enhanced networking functionality, including a GbE interface for high-speed transfer of sensor information.
Automotive microcontrollers need to meet the requirements of running software components with varying safety integrity levels simultaneously and without interference. Automotive control requires software independence as well as real time responsiveness. To meet these next-generation requirements, Renesas has developed new technologies led by virtualization-assisted functions for automotive-control MCUs, as demonstrated in the new test chip.
Typically, software-based (hypervisor) virtualisation requires greater processing time as it has to emulate hardware virtually. The increased processing time is problematic for automotive-control microcontrollers that must maintain real time responsiveness. The hardware-based virtualisation-assisted functions were developed to reduce the virtualisation overhead and boost responsiveness. Allowing software components to operate independently makes it possible for the microcontroller to deliver both virtualisation and real-time performance as required by ASIL D.
One way to avoid disturbing a CPU processing period is to to perform self-diagnostics in the period between when the microcontroller enters the standby state and when resume occurs. There is, however, limitation regarding current fluctuations, meaning that the increase in the current fluctuation rate caused by resume due to self-diagnostics is a concern. Renesas has developed SR-BIST to minimise the current fluctuation rate. SR-BIST runs before the CPU begins operating each time there is a transition from standby to resume. To ensure rapid start up, the on-chip oscillator supplies a clock for the fault diagnostics. An N/M divider is used to gradually increase the frequency of the clock, reducing the current fluctuation rate when SR-BIST is executing. As a result, it allows functional safety that meets the requirements of ASIL D, confirms Renesas.
Ethernet will be the high-speed communication interface to handle the volume of data generated by connected vehicles. Renesas has developed a GbE interface using 5V transistors that supports the Serial Gigabit Media Independent Interface (SGMII) standard and provides electrical noise tolerance. To deal with deterioration of the signal bandwidth due to the use of 5V transistors, dedicated circuits were added for receiver and driver. This results in signal quality that complies with the SGMII standard, says Renesas.
Renesas presented the test results at this week’s International Solid-State Circuits Conference (ISSCC) 2019, in San Francisco, USA.
