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The Cascade family of MEMS clock ICs have been introduced by SiTime for 5G, wireline telecomms and data centre infrastructure. The SiT9514x is a clock-system-on-a-chip (ClkSoC) family of clock generators, jitter cleaners, and network synchronisers that deliver multiple clock signals in a system. The devices use SiTime’s third-generation MEMS resonators for low power, high performance operation.
The Cascade ClkSoCs can replace clock ICs which have external quartz references, used by communications systems to integrate multiple timing functions and to distribute clock signals. The SiT9514x’s all-silicon clock architecture integrates a MEMS resonator reference inside the package.
The integrated MEMS resonator eliminates issues with quartz such as capacitive mismatch, activity dips, susceptibility to shock, vibration, and EMI, says SiTime.
Based on SiTime’s MEMS technology, the Cascade clock-SoC is claimed to deliver up to 10 times higher reliability and resilience, to enable zero downtime. This is particularly relevant for 5G networks.
5G is expected to deliver 10 times faster speeds and 10,000 times more data, with 50 times lower latency and zero downtime. To make this vision a reality, SiTime explains, 10 to 30 times more devices will be deployed, many of them in uncontrolled environments close to the consumer. Each of these connectivity gains is dependent on the accuracy, resilience and reliability of the timing heartbeat of the system. Silicon MEMS timing technology inherently provides better
Used as a standalone device or with SiTime’s MEMS TCXOs and OCXOs, the SiT9514x can be used for timing in a variety of applications such as 5G remote radio units (RRUs), small cells, edge computers, switches and routers.
The Cascade family joins SiTime’s Elite Platform Super-TCXOs and Emerald OCXOs. The Cascade devices offer a complete clock SoC which allows our customers to simplify their designs and reduce time to market. SiTime believes it is the only provider of MEMS resonators, oscillators, and clock ICs.
The SiT9514x clock SoCs feature four independent PLLs, with the flexibility to support time synchronisation applications where multiple independent clock domains are required. There are up to 11 outputs with an operating frequency range of 8kHz to 2.1GHz, as well as a one pulse per second (PPS) output, for maximum frequency agility.
The programmable PLL loop bandwidth is down to 1mHz for maximum filtering of wander or network noise in IEEE 1588 and synchronous Ethernet. Another feature is fail-safe operation in case of input clock failures through faster hitless switching between four independent inputs. In such a situation, the device automatically switches to different input clock sources with minimum phase transient at the output, allowing the downstream PLL to remain locked, and the system to continue to operate reliably
Rich programmable features and configuration options are blank in-system programmable (ISP) devices and pre-programmed versions which enable system boot up without software configuration for maximum simplicity
EVBs and TimeMaster software enable users to map clock configurations and generate the scripts for software integration, which speeds development
The SiT9514x clock-system-on-a-chip family is sampling now. High volume production quantities will be available in Q4 2020.

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