Mach-NX FPGA is designed for cyber-resilient systems

Lattice Semiconductor has added support for ECC 384 and SPDM protocols in its second generation of secure control FPGAs. Following on from the secure control of the Lattice MachXO3D FPGAs, released last year, the FPGAs are the third family in 12 months that have been developed on the Lattice Nexus FPGA platform. The company says the Mach-NX FPGAs deliver heightened security features and the fast, power-efficient processing needed to implement a real time hardware root of trust (HRoT) on future server platforms, computing, communications, industrial and automotive systems.

According to the company, the Mach FPGA families can simplify and accelerate implementation of technologies, such as ECC 384 and data security protocols like SPDM, to secure platforms against cyber attack and IP theft.

Esam Elashmawi, chief strategy and marketing officer at Lattice, commented: “Securing systems against unauthorised firmware access goes beyond establishing a HRoT at boot. It also requires that components used to build the system are not compromised as they move through the global supply chain. When combined with the additional protection afforded by our SupplyGuard security service, Lattice Mach-NX FPGAs can protect a system throughout its entire lifecycle: beginning at the time components start moving through the supply chain, through initial product assembly, end-product shipping, integration, and throughout the product’s operational lifetime.”

The Mach-NX FPGAs combine a secure enclave (a 384-bit hardware-based crypto engine supporting reprogrammable bitstream protection) with a logic cell and I/O block. The enclave helps secure firmware, and the logic cell and I/O block enable system control functions such as power management and fan control. The FPGAs can verify and install the over-the-air firmware updates to keep systems compliant as security guidelines evolve and protocols are introduced.

The parallel processing architecture and dual-boot flash memory configuration provide the near instantaneous response times needed to detect and recover from attacks (a level of performance beyond the capabilities of other HRoT platforms like MCUs), reports Lattice.

The FPGAs will support Lattice Sentry, a software stack of customisable embedded software, reference designs, IP and development tools. This accelerates the implementation of secure systems to comply with NIST SP-800-193, Platform Firmware Resiliency (PFR) guidelines and MCTP-SPDM.

The Lattice SupplyGuard supply chain security subscription service tracks locked Lattice FPGAs through their entire lifecycle, from the point of manufacture, through transport via the global supply chain, system integration and assembly, initial configuration, and deployment.

The Lattice Propel design environment accelerates design of a customised, PFR-compliant HRoT solution. It uses a GUI-based development environment that allows developers to create PFR solutions while minimising the need to write RTL code, explains Lattice.

http://www.latticesemi.com

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TDK uses proprietary microcontroller in flash storage disks

Five series of flash storage products from TDK use GBDriver GS2, its proprietary NAND flash memory control IC, which supports serial ATA. They are optimised for industrial, medical, smart grid, transportation and security applications.

As 3D flash memory technology advances, flash storage solutions with capacities over 1 Tbyte are widely used, but data reliability requirements continue to become more sophisticated, explains TDK. With flash storage integrated into edge devices in industrial equipment, and other industrial IoT devices mostly used to store OS or device applications, the demand has increased for highly reliable storage devices that also protect user data.

In addition to auto refresh and data recovery features, the GBDriver GS2 features new error code correction (ECC), the LDPC memory and strong RAID features, and enhances data reliability, says TDK. The five families provide a wide range of storage capacities, from 16Gbyte to 1.6Tbyte.

A standard feature of all five storage products is the internal power back-up protection circuits, with 2D MLC NAND flash memory. There is also write protection with unified write filter (UWF) for Windows 10. Power interruption tolerance is also enhanced with 3D TLC NAND flash memory.

They also offer strengthened security features, including a new firmware anti-tampering feature. TDK’s original anti-spoofing security feature, AES128/256-bit encryption, and ATA security, protects users against falsification and the leakage of data stored in NAND flash memory.

They storage disks can be used in a variety of industrial IoT applications, including in devices such as information terminals and edge computing systems. They are also suitable for industrial computers, factory automation equipment, railway and transportation service equipment. Other uses are in ticket vending machines and banking terminals, medical and data analysis equipment, smart grid equipment and security equipment, for example in security terminals.

TDK Corporation was established in 1935 to commercialise ferrite, a key material in electronic and magnetic products. TDK’s portfolio features passive components such as ceramic, aluminum electrolytic and film capacitors, as well as magnetics, high-frequency, and piezo and protection devices. The product spectrum also includes sensors and sensor systems such as temperature and pressure, magnetic, and MEMS sensors. In addition, TDK provides power supplies and energy devices and magnetic heads.

The products are marketed under the product brands TDK, Epcos, InvenSense, Micronas, Tronics and TDK-Lambda.

TDK focuses on demanding markets in automotive, industrial and consumer electronics, and information and communication technology. The company has a network of design and manufacturing locations and sales offices in Asia, Europe, and in North and South America.

http://www.tdk.com

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Three application processor cores from Codasip support RISC-V P extensions

Three 64-bit RISC-V application processor cores have been released by customisable RISC-V processor IP specialist, Codasip. The A70XP provides support for RISC-V P extensions, the A70X‑MP and A70XP‑MP enable the creation of symmetric multi-processor (SMP) systems.

The RISC-V P extension consists of 331 instructions which can be divided into groups. The A70XP includes a single instruction, multiple data (SIMD) unit which executes P extension instructions with single cycle latency. Multi-cycle instructions are pipelined to allow one to be executed every clock cycle. The core can be used for audio encoding/decoding, sensor fusion, computer vision and edge artificial intelligence/machine learning (AI/ML) applications.

The A70X-MP and A70XP-MP cores add multi-core features to the Codasip application processor family, supporting clusters of up to four cores in an SMP configuration. Codasip provides configurable L1 and L2 caches with a scalable microarchitecture. All three application processors use an AXI external interface (Advanced eXtensible Interface, part of the Arm Advanced Microcontroller Bus Architecture 3 and 4 specifications) and support Linux.

The Application RISC-V processors (denoted by product names beginning with A) are based on the same microarchitecture as the A70X (Codasip Bk7). All the Application cores are 64-bit and feature a floating point unit and Atomic instructions. They also support machine, supervisor and user privilege modes and have a memory management unit (MMU), therefore they are able to run Linux. Like other RISC-V cores by Codasip, they have been are developed using Codasip Studio allowing them to be customised to meet domain-specific requirements.

The cores have been developed as a result of combining skills at Codasip’s new design centre in France and Codasip’s main R&D centre in Brno, in the Czech Republic.

The A70X core is available today and the other three cores will be available in the first quarter of 2021.

Karel Masařík, CEO Codasip, said the company expects to introduce more new products in 2021.

Codasip offers two further processor families for the embedded domain, the small and efficient low power embedded processors and more powerful high performance embedded processors. Both of these families are based on the Codasip Bk3 and Bk5 microarchitectures.

Codasip delivers processor IP and design tools, providing IC designers with all the advantages of the RISC-V open ISA, and can customise the processor IP.

The company is a founding member of the RISC-V Foundation and a long-term supplier of LLVM and GNU-based processor solutions, and is committed to open standards for embedded processors.

Codasip was formed in 2014 and is headquartered in Munich, Germany. There are offices in Europe and China, and sales representatives worldwide.

http://www.codasip.com

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dSpace partners with Microsoft Azure to develop ADAS

Customers of dSpace will have access to the data-driven development of advanced driver assistance systems (ADAS) and autonomous driving (AD) on the Microsoft cloud computing platform Azure, following the announcement that the two companies will work together to offer research and development engineers in the automotive industry an end-to-end solution that is scalable, secure, efficient, and agile.

The development of ADAS/AD functions relies on capturing large volumes of data from the vehicle perception sensors, buses, and networks, and on generating simulated scenarios to analyse the behaviour of the software, individual systems, subsystems as well as complete, integrated systems. The incoming data has to be enriched to a usable format, and it must be easy to distribute to teams working on AI-based development, data replay as well as simulation and validation tasks. This requires a powerful, flexible, and centralised data storage system, as well as a scalable and computational infrastructure with AI- and machine learning (ML) -based tools that can run seamlessly in the same environment.

Supplier to the automotive industry, dSpace offers mature and proven end-to-end solutions for ADAS/AD simulation and validation, including data logging, data enrichment, advanced simulation models, and data management software. Microsoft’s global, open, and scalable cloud platform allows businesses meet security, privacy and compliance requirements while innovation and development continues.

In this way, says dSpace, an integrated end-to-end solution for data-driven development can be achieved, allowing automotive OEMs and suppliers to focus on algorithm development.

“We combine our comprehensive and mature simulation portfolio with the highly scalable computational infrastructure of Microsoft Azure so that our customers can take full advantage of best-in-class solutions of both areas,” says Tino Schulze, executive vice president of Automated Driving & Software Solutions at dSpace.

“Collaborating with Microsoft will enable us to further expand our expertise in the areas of cloud computing and big data. Together, we will tackle the challenges of our automotive customers, supporting them in getting self-driving cars on the road faster,” explained Martin Goetzeler, CEO of dSpace.

dSpace provides solutions for developing connected, autonomous, and electrically powered vehicles. Automotive manufacturers and their suppliers use the company’s end-to-end solution range to test the software and hardware components of their new vehicles long before a new model is allowed on the road. Engineers also rely on dSpace expertise in aerospace and industrial automation. Its portfolio ranges from end-to-end solutions for simulation and validation to engineering and consulting services as well as training and support.

The company is headquartered in Paderborn, Germany and has three project centres in Germany. Customers are served through regional companies in the USA, the UK, France, Japan, China, and Croatia.

http://www.dspace.de

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