Compact microwave rotary joint from Link Microtek has three X-band channels

Designed and manufactured at Link Microtek’s UK facility, the AMCORJD-3 is a three-channel rotary joint for X-band radar systems. It joins the company’s existing range of microwave rotary joints. One of the three X-band channels is used for transmit and the others for receive signals in radar systems for coastal/border surveillance or critical infrastructure protection. 

The AMCORJD-3 enables microwave signals to be fed to or from a compact radar antenna rotating continuously at speeds in excess of 60rpm and typically exposed to harsh environmental conditions such as wind, rain and salt spray. It was also designed to fit in the same space as the company’s earlier, two-channel version.

Both channels cover the frequency range 8.5 to 9.5GHz and can handle average microwave power in excess of 50W and peak powers of over 200W. In terms of microwave performance, maximum insertion loss is only 1.2dB, maximum VSWR (voltage standing wave ratio) is 1.5:1 and isolation is 80dB.

To satisfy requirements for long life and continuous operation, the robust rotary joint uses a non-contacting design, so the only parts subject to wear are the bearings. The AMCORJD-3 is fabricated from lightweight aluminium with a Surtec finish and incorporates IP65 sealing to protect it from the ingress of moisture and dust. There are N-type connectors on the rotating side and SMA connectors on the fixed side. The rotary joint has overall dimensions of 84 x 150mm, excluding the connectors and bulkhead mounting flange. Other rotary-joint configurations and sizes can be supplied on request and customised to suit specific radar antenna requirements.

Visit Link Microtek at European Microwave Week (EuMW) at the 

ExCeL London Exhibition & Conference Centre from 04 to 06 April 2022. Stand 119

http://www.linkmicrotek.com 

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CUDA-X library updates address 6G, robotics and quantum computing

At GTC 2022, Nvidia announced more than 60 updates to CUDA-X libraries. The company claimed they will allow new areas to access accelerated computing capabilities. For example, they are expected to accelerate work in quantum computing and 6G research, logistics optimisation research, robotics, cybersecurity, genomics and drug discovery as well as data analytics.

The updates to CUDA-X libraries and tools “dramatically improve” the performance of the CUDA software computing platform and many are immediately available. 

“Innovation in AI and accelerated computing is driving major scientific breakthroughs and the creation of new applications and services in virtually every industry,” said Greg Estes, vice president of Developer Programs at Nvidia. 

Built on top of CUDA, the company’s platforms for AI, HPC (high performance computing) and graphics include software development kits and tools that enable higher performance and accelerated algorithms across multiple application domains. The updates make the Nvidia systems that developers already use across science, AI and data processing, even faster, said the company. 

Included in the GTC announcement is the cuQuantum, for accelerating quantum circuit simulation. It is generally available and – for the first time – available in the cuQuantum DGX Appliance, which provides HPC researchers a full quantum simulation stack optimised for deployment on the Nvidia DGX platform. cuQuantum is integrated as a back end in popular simulators from Google Quantum AI, Xanadu and Oak Ridge National Laboratory. It is also now being offered as a part of quantum application development platforms from Classiq and Zapata Computing, and is being used by QC Ware, Xanadu and others to power quantum research at scale in areas from chemistry to climate modelling. 

There is also Sionna, for 6G physical-layer research. This is a new, GPU-accelerated, open-source library, with native support for the integration of neural networks and machine learning. Sionna enables rapid prototyping of complex communication system architectures. 

The Rapids Accelerator for Apache Spark speeds processing by over three times with no code changes. 

For cybersecurity, there is Morpheus, which makes it possible to analyse up to 100 per cent of one’s data in real time, for more accurate detection and faster remediation of threats as they occur. 

Another update is Nsight Systems, for system-wide visualisation of an application’s performance. It allows developers to see how GPU- accelerated libraries use system resources, interact with the application and identify optimisation opportunities to reduce bottlenecks. 

Other library updates include Monai for medical imaging, Maxine, for communications, Riva, for speech AI, Merlin, for recommender systems and Isaac, for robotics. 

http://www.nvidia.com

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Octavo Systems bases SiP devices on AMD-Xilinx Zynq UltraScale+ MPSoC 

The OSDZU3 family of SiP devices by Octavo Systems uses the AMD Xilinx Zynq UltraScale+ MPSoC architecture.

SiP is based on the AMD-Xilinx Zynq UltraScale+ MPSoC ZU3 and integrates LPDDR4, EEPROM, QSPI, MEMS oscillators and more than 100 passive components in a single BGA measuring 20.5 x 40mm.

According to Octavo, the OSDZU3 is about 60 per cent smaller than an equivalent system design with discrete components. As well as addressing SWaP (size, weight and power) of a product, the SiP removes the need to design complicated power systems of DDR, saving customers up to nine months in design time, said Greg Sheridan, vice president of strategy and marketing at Octavo Systems.

The OSDZU3 provides access to all the interfaces and features on the AMD-Xilinx ZU3. The 1mm pitch, 600 pin ball map provides access to every I/O on the ZU3 in just two PCB layers using low-cost design rules. The power system also allows the designer to leverage all the power modes the ZU3 supports.

“System-level solutions are increasingly important to our customers, as they seek to deploy cutting-edge embedded computing and machine learning capabilities within increasingly compressed development timeframes,” said Hanneke Krekels, vice president of Core Vertical Markets, Adaptive & Embedded Computing Group, AMD. “In-line with these objectives, we have worked closely with Octavo Systems to bring the first System-in-Package solution based on the powerful Zynq UltraScale+ MPSoC. This offering enables our users to accelerate innovation and simplify system design for the most size constrained applications.”

The OSDZU3 is compatible with the AMD-Xilinx development tools, Xilinx Vivado Design Suite and Xilinx Vitis unified software platform. 

Octavo Systems worked closely with DesignLinx, an AMD-Xilinx Premier Design Service partner, to develop the base software platform needed to ensure the SiP integrates into the standard AMD-Xilinx tool flow.

To accompany the OSDZU3 SiP, Octavo Systems will be releasing the OSDZU3-REF reference platform. It features popular interfaces like USB-C, USB 3.0, SATA Host, 1Gb Ethernet, and an FMC LP Connector. It also supports displays through Display Port and a LVDS touch display connector. It will ship with a PetaLinux Distribution and demos that are also developed by DesignLinx.

Octavo Systems has also franchised Avnet as a global distributor for the OSDZU3 SiP. Engineering samples are available today through the beta program. Design engineers who are interested in gaining access to the beta program can contact their local Avnet, Octavo Systems, or AMD-Xilinx sales representative.

The reference platform will be available to the general market in Q3 and the OSDZU3 will be in production by the end of the year.

https://octavosystems.com

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High speed jumper cable supports PAM4

At next week’s DesignCon 2022, Yamaichi and JAE will show the jointly developed high speed jumper able interconnect which supports the 112Gbits per second PAM4 signal. 

It has been developed to meet the need for increased data transmission speeds for network equipment such as the routers and switches as the 5G network expands and the industry moves towards 6G technology. To fulfill this market demand, said Yamaichi, it has teamed up with JAE to developed the interconnect, combining both company’s design expertise.

As requirements for data transmission speed reach upper limits of existing PCB technologies, it is becoming more difficult to realise constant and reliable data transmission performance. To solve this problem, the two companies have jointly developed a jumper cable interconnect product which can perform stable data transmission at 112Gbits per second PAM4 signalling.

The interconnect has been designed with a compact connector in order to fit in high-density designs. It can be used for direct jumper cabling from the front panel pluggable I/O to host chip, or for internal chip to chip connection.

Yamaichi supplies high speed connectors for data networking market and JAE specialises in connector and cable harness products for a range of market segments including 5G data networking market. 

The high speed jumper able interconnect will be demonstrated at the Yamaichi booth #960) at DesignCon2022 in Santa Clara, California, USA from 5 to 7 April.

http://www.yamaichi.eu

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