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Common source dual GaN FET is AEC-qualified for lidar systems

Thu, Apr 21, 2022

The latest addition to Efficient Power Conversion (EPC)’s family of automotive qualified transistors and ICs is small enough for time-of-flight (ToF) lidar applications including robotics, drones, 3D sensing and autonomous cars.

The EPC2221 is a common source dual GaN FET rated at 100V, 58 mOhm and 20A pulsed current. The FET can be also be used in surveillance systems and vacuum cleaners.

The low inductance and capacitance of the EPC2221 allows fast switching (100MHz) and narrow pulse widths (two nanoseconds) for high resolution and high efficiency. Additionally, the small size (1.35 x 1.35mm) reduces PCB cost and total solution size, says EPC.

This latest member of EPC’s family of GaN transistors and ICs designed to meet the performance and reliability standards of demanding automotive applications has completed AEC Q101 qualification testing including humidity testing with bias (H3TRB), high temperature reverse bias (HTRB), high temperature gate bias (HTGB), and temperature cycling (TC).

In addition to lidar in automotive applications, the EPC2221 is suited to high-frequency DC/DC conversion, wireless power applications and synchronous rectification.

Alex Lidow, CEO and co-founder of EPC, believes this IC “improves the performance while reducing size and cost for time-of-flight lidar systems.”

The EPC2221 is available for immediate delivery from Digi-Key Electronics.

Designers interested in replacing silicon MOSFETs with a GaN device can use the EPC GaN Power Bench’s cross reference tool to find a suggested replacement based on operating conditions.

EPC specialises in enhancement mode GaN-based power management. The company says eGaN FETs and ICs provide performance many times greater than the best silicon power MOSFETs in applications such as DC/DC converters, remote sensing technology (lidar), motor drives for eMobility, robotics, and drones and low-cost satellites

EPC will be at PCIM Europe (10–12 May 2022) Hall 9 – Stand 113

http://www.epc-co.com

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Program partners FPGA-based IP with Bittware accelerator technologies

Thu, Apr 21, 2022

Pairing new FPGA-based IP from partner companies with BittWare’s compute, network, storage and sensor processing accelerator products, the BittWare Partner Program intends to reduce risk while accelerating time to market.

As FPGAs increase in size, complexity and performance, the development of customized IP and board level capabilities can prove time-consuming, expensive and resource-intensive. The BittWare Partner Program is designed to simplify and streamline customer deployments of these high performance, data intensive applications. According to BittWare it removes major time-to-market and technology hurdles by facilitating an ecosystem of FPGA-based enablement IP and full solutions that use BittWare’s proven FPGA accelerator technology.

The programme empowers FPGA designers to access a robust ecosystem of proven IP cores, tools, frameworks and solutions from a central source, explains Craig Petrie, vice president of sales and marketing at BittWare. “In doing so, we are uniquely positioned to close critical gaps in the FPGA design process while reducing risk and accelerating commercialisation of innovative, high-performance applications.”

The partner programme aligns products from industry-leading and emerging IP providers with BittWare’s compute, network, storage and sensor processing accelerator technologies. In addition to achieving faster out-of-the-box functionality, the ability to combine critical components of the FPGA design process reduces engineering and programming requirements, points out the company. This enables customers to focus in-demand resources on developing other capabilities.

Customers have the opportunity to collaborate much earlier in the design process to meet the varying demands of powerful next-generation applications, such as AI, machine learning inference, database acceleration, computational storage, 5G, test and measurement and security.

The inaugural list of ten partners includes Intel – BittWare leverages the Intel Agilex FPGA technology and oneAPI toolkits to simplify development of high performance computing (HPC) applications; EdgeCortix (an edge AI-focused fabless semiconductor company) and Megh Computing, provider of real-time, AI-based video analytics. For network development, Atomic Rules provides mission-critical, enterprise-grade IP cores and solutions from the data centre to the edge; Enyx specialises in low latency, FPGA-enabled technologies for the financial, telecomms and HPC sectors; Grovf develops application acceleration and network offload solutions using FPGA chips; Siama Systems specialises in Ethernet/IP network infrastructure test for 5G RAN, MEC and data centres and Xiphera develops cryptographic IP cores, designed directly for FPGAs.

Other partners address storage, namely Eideticom (computational storage for cloud, HPC and enterprise data centres) and IntelliProp, which provides IP cores, ASIC design and verification services for the storage industry.
BittWare, a Molex company, designs and manufactures enterprise-class FPGA hardware.

Molex has a presence in more than 40 countries, and enables technology innovation in the automotive, data centre, industrial automation, healthcare, 5G, cloud and consumer device industries.

http://www.molex.com.

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Tasking extends the VX-toolset for Arm with Traveo T2G support

Wed, Apr 20, 2022

Version 6.0r1 of the VX-Toolset compiler toolchain for Arm Cortex-M also supports Infineon’s Traveo T2G microcontroller family.

The Traveo T2G microcontroller family is based on Arm’s Cortex-M4 / Cortex-M7. Infineon and Tasking have worked on software development tools for TriCore/Aurix (TC2x, TC3x and TC4x) and now with support for the Traveo T2G family, Tasking offers toolchains for Infineon’s entire microcontroller portfolio. Having compilers for both Traveo T2G and Aurix available from a single tool partner simplifies the work of users who use both microcontrollers.

The VX-Toolset for Arm Cortex-M is qualified according to ISO 26262 up to ASIL D. TÜV certification is planned for this year.

Tasking supplies a safety manual with the toolchain. As long as users follow the recommendations described there, they can use the toolchain for the development of safety-critical applications up to ASIL D without any further qualification measures, advises the company. This significantly simplifies and accelerates the certification of the system and reduces costs for the customer, says Tasking.

The VX-toolset for Arm Cortex-M v6.0r1 is available immediately.

Tasking Germany specialises in providing embedded software development tools. The company is headquartered in Munich, Germany. Tasking development tools are used by automotive manufacturers and the world’s largest Tier 1 supplier to realise high-performance applications in safety critical areas. The tools are used to develop the latest applications to optimum reliability, functional safety and performance standards.

http://www.tasking.com

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Clock buffers and multiplexers meet PCIe Gen6 specifications

Tue, Apr 19, 2022

Believed to be the first clock buffers and multiplexers on the market to meet stringent PCIe Gen6 specifications, the RC190xx clock buffers and RC192xx multiplexers have been released by Renesas.

The release comprises 11 clock buffers and four multiplexers. The devices, which also support and provide extra margin for PCIe Gen5 implementations, complement Renesas’ low-jitter 9SQ440, 9FGV1002 and 9FGV1006 clock generators for PCIe Gen6 timing for data centre / cloud computing, networking and high-speed industrial applications.

The PCIe Gen6 standard supports extremely high data rates of 64Gtransfers per second while requiring very low clock jitter performance of less than 100fs RMS. The RC190xx clock buffers and RC192xx multiplexers have PCIe Gen6 additive jitter specs of only 4fs RMS, making them virtually noiseless, says Renesas. The company claims this means they future-proof designs for the next generation of industry standards.

“PCIe Gen6 timing will be at the heart of new equipment in data centers, high-speed networking and other applications,” said Zaher Baidas, vice president of the Timing Products division at Renesas.

“It will be interesting to see the innovative implementations that result from this new capability, especially when considering how solutions for the emerging Chiplet market are starting to evolve, with the need for increasing speed and bandwidth as an underlying constant,” comments Rich Wawrzyniak, principal analyst for Semico Research.

The PCIe Gen6 clock buffers and multiplexers offer 1.4ns in-out delay, 35ps out-out skew and -80dB PSRR (power supply rejection ratio) at 100kHz in addition to low 4fs PCIe Gen6 additive jitter.

Selectable SMBus addresses facilitate the use of multiple devices while SMBus write-protect feature enhances system security.

The devices represent 30 per cent space-saving compared to earlier devices, adds Renesas.

Other features are loss-of-signal (LOS) output supports system monitoring and redundancy, a four-wire side-band interface to support high speed serial output enable / disable and device daisy-chaining. In addition, power down tolerant (PDT) and flexible start-up sequencing (FSS) features ensure good behaviour under abnormal system conditions, the company claims.

The RC190xx buffers are offered in 4-, 8-, 13-, 16-, 20- and 24-output configurations. The RC192xx multiplexers include 2-, 4-, 8- and 16-output versions. They are offered in packages as small as 3.0 x 3.0mm.

All of the new devices are available now, and Renesas also offers an evaluation board schematic.

http://www.renesas.com

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Common source dual GaN FET is AEC-qualified for lidar systems

Program partners FPGA-based IP with Bittware accelerator technologies

Tasking extends the VX-toolset for Arm with Traveo T2G support

Clock buffers and multiplexers meet PCIe Gen6 specifications

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